From 456ee909d63a35daa51b70231c4abffa4709e9f3 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 30 Jul 2015 03:49:14 -0700 Subject: x86: minnowmax: Remove smsc47x superio codes On Intel BayTrail SoC, there is a legacy UART (I/O 0x3f8) integrated into the SoC which is enabled by the FSP. Remove the smsc47x superio initialization codes. Signed-off-by: Bin Meng Acked-by: Simon Glass diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c index 383cae0..c4f2c33 100644 --- a/board/intel/minnowmax/minnowmax.c +++ b/board/intel/minnowmax/minnowmax.c @@ -6,12 +6,7 @@ #include #include -#include -#include #include -#include - -#define SERIAL_DEV PNP_DEV(0x2e, 4) int arch_early_init_r(void) { @@ -21,13 +16,6 @@ int arch_early_init_r(void) return 0; } -int board_early_init_f(void) -{ - lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ); - - return 0; -} - void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio) { return; diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 4781e79..655ce3d 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -14,11 +14,9 @@ #include #define CONFIG_SYS_MONITOR_LEN (1 << 20) -#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_X86_SERIAL -#define CONFIG_SMSC_LPC47M #define CONFIG_PCI_MEM_BUS 0xd0000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS -- cgit v0.10.2