diff options
author | Evert Pap <evert.pap@sintecs.nl> | 2016-05-20 08:27:23 (GMT) |
---|---|---|
committer | Evert Pap <evert.pap@sintecs.nl> | 2016-06-01 08:20:12 (GMT) |
commit | 5fd063eff92287fdcb65064d835682f100a4e246 (patch) | |
tree | 2def12b5777c6f52051eb99f5438944a955ffb53 | |
parent | 0247864d78189c1ca73dfba348eeddcfeb618a35 (diff) | |
download | linux-fsl-qoriq-5fd063eff92287fdcb65064d835682f100a4e246.tar.xz |
Add T1040 device treescalys
-rw-r--r-- | arch/powerpc/boot/dts/simc-t1040.dts | 309 |
1 files changed, 309 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/simc-t1040.dts b/arch/powerpc/boot/dts/simc-t1040.dts new file mode 100644 index 0000000..57dbfcc --- /dev/null +++ b/arch/powerpc/boot/dts/simc-t1040.dts @@ -0,0 +1,309 @@ +/* + * Device tree for the SiMC-T1040 Module + * + * Copyright 2016 Scalys B.V. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + */ + +/include/ "fsl/t104xsi-pre.dtsi" +/include/ "simc-t10xx.dtsi" + +/ { + model = "fsl,T1040D4RDB"; + compatible = "fsl,T1040D4RDB"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + chosen { + name = "chosen"; + + dpaa-extended-args { + fman1-extd-args { + cell-index = <0>; + compatible = "fsl,fman-extended-args"; + fman1_rx3-extd-args { + cell-index = <3>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + ar-tables-sizes = <10 10 10 10 10 10 20 2000>; + ar-filters-sizes = <10 20 20>; + }; + }; + }; + }; + + aliases { + phy_rgmii_0 = &phy_rgmii_0; + phy_rgmii_1 = &phy_rgmii_1; + }; + + soc: soc@ffe000000 { + ranges = <0x00000000 0xf 0xfe000000 0x1000000>; + reg = <0xf 0xfe000000 0 0x00001000>; + + + qman: qman@318000 { + }; + bman: bman@31a000 { + }; + + fman0: fman@400000 { + sleep = <&rcpm 0x00000008>; + + enet0: ethernet@e0000 { + status = "disabled"; + }; + + enet1: ethernet@e2000 { + phy-connection-type = "sgmii"; + fixed-link = <2 1 1000 0 0>; + sleep = <&rcpm 0x40000000>; + }; + + enet2: ethernet@e4000 { + phy-connection-type = "sgmii"; + fixed-link = <3 1 1000 0 0>; + sleep = <&rcpm 0x20000000>; + }; + + enet3: ethernet@e6000 { + phy-handle = <&phy_rgmii_0>; + phy-connection-type = "rgmii"; + sleep = <&rcpm 0x10000000>; + local-mac-address = [ ca fe ba be 00 01 ]; + }; + + enet4: ethernet@e8000 { + phy-handle = <&phy_rgmii_1>; + phy-connection-type = "rgmii"; + sleep = <&rcpm 0x08000000>; + local-mac-address = [ ca fe ba be 00 02 ]; + }; + + mdio0: mdio@fc000 { + phy_rgmii_0: ethernet-phy@00 { + reg = <0x00>; + }; + phy_rgmii_1: ethernet-phy@01 { + reg = <0x01>; + }; + }; + }; + + l2switch: l2switch@800000 { + port@100000 { + phy-connection-type = "sgmii"; + fixed-link = <1 1 1000 0 0>; + }; + port@110000 { + phy-connection-type = "sgmii"; + fixed-link = <1 1 1000 0 0>; + }; + port@120000 { + phy-connection-type = "sgmii"; + fixed-link = <1 1 1000 0 0>; + }; + port@130000 { + status = "disabled"; + }; + port@140000 { + status = "disabled"; + }; + port@150000 { + status = "disabled"; + }; + port@160000 { + status = "disabled"; + }; + port@170000 { + status = "disabled"; + }; + }; + }; + + fsl,dpaa { + compatible = "fsl,t1040-dpaa", "fsl,dpaa"; + + ethernet@1 { + compatible = "fsl,t1040-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,t1040-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + }; + ethernet@3 { + compatible = "fsl,t1040-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + ethernet@4 { + compatible = "fsl,t1040-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet4>; + }; + }; + + qe: qe@ffe139999 { + ranges = <0x0 0xf 0xfe140000 0x40000>; + reg = <0xf 0xfe140000 0 0x480>; + brg-frequency = <0>; + bus-frequency = <0>; + + si1: si@700 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,qe-si"; + reg = <0x700 0x80>; + }; + + siram1: siram@1000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,qe-siram"; + reg = <0x1000 0x800>; + }; + + tdma: ucc@2000 { + compatible = "fsl,ucc-tdm"; + rx-clock-name = "clk8"; + tx-clock-name = "clk9"; + fsl,rx-sync-clock = "rsync_pin"; + fsl,tx-sync-clock = "tsync_pin"; + fsl,tx-timeslot = <0xfffffffe>; + fsl,rx-timeslot = <0xfffffffe>; + fsl,tdm-framer-type = "e1"; + fsl,tdm-mode = "normal"; + fsl,tdm-id = <0>; + fsl,siram-entry-id = <0>; + }; + + ucc@2200 { + compatible = "fsl,ucc_hdlc"; + rx-clock-name = "clk10"; + tx-clock-name = "clk11"; + fsl,rx-sync-clock = "rsync_pin"; + fsl,tx-sync-clock = "tsync_pin"; + fsl,tx-timeslot = <0xfffffffe>; + fsl,rx-timeslot = <0xfffffffe>; + fsl,tdm-framer-type = "e1"; + fsl,tdm-mode = "normal"; + fsl,tdm-id = <1>; + fsl,siram-entry-id = <2>; + fsl,tdm-interface; + }; + }; +}; +/include/ "fsl/t1040si-post.dtsi" +/include/ "fsl/qoriq-dpaa-res3.dtsi" + +&i2c0 { + adt7476: thermal@2e { + compatible = "adi,adt7476"; + reg = <0x2e>; + }; + + adt7461a@4c { + compatible = "adt7461a"; + reg = <0x4c>; + }; + + ucd9220: powermanager@4e { + compatible = "ti,ucd9224"; + reg = <0x4e>; + }; + + eeprom_module@50 { + compatible = "microchip,24c1024"; + reg = <0x50>; + }; + + eeprom_carrier@54 { + compatible = "microchip,24c1024"; + reg = <0x54>; + }; + + + rtc@68 { + compatible = "dallas,ds1307"; + reg = <0x68>; + }; +}; + +&i2c3 { + tca9546@70 { + /* Actual device is a TI TCA9546, but they are functional compatible */ + compatible = "philips,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + at24@30 { + compatible = "at24,24c01"; + reg = <0x30>; + }; + sfp@50 { + compatible = "optics,sfp"; + reg = <0x50>; + }; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + at24@30 { + compatible = "at24,24c01"; + reg = <0x30>; + }; + sfp@50 { + compatible = "optics,sfp"; + reg = <0x50>; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + + at24@30 { + compatible = "at24,24c01"; + reg = <0x30>; + }; + sfp@50 { + compatible = "optics,sfp"; + reg = <0x50>; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + clock-frequency = <100000>; + + at24@30 { + compatible = "at24,24c01"; + reg = <0x30>; + }; + sfp@50 { + compatible = "optics,sfp"; + reg = <0x50>; + }; + + }; + }; +}; + +&sdhc { + /*bus-width = <4>;*/ + voltage-ranges = <3300 3300>; +}; |