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| author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2008-10-13 19:39:39 (GMT) |
|---|---|---|
| committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2008-10-13 19:39:39 (GMT) |
| commit | 8595259ccb6a13b9aab31832ce874d157064d256 (patch) | |
| tree | c42580839c95347927753c362cffd53279aed924 | |
| parent | 00bb2c16e84845a381162df03eec79129b30271c (diff) | |
| download | linux-fsl-qoriq-8595259ccb6a13b9aab31832ce874d157064d256.tar.xz | |
cy82c693: remove no longer needed CY82C693_DEBUG_LOGS code
Having CY82C693_DEBUG_INFO is enough nowadays.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
| -rw-r--r-- | drivers/ide/pci/cy82c693.c | 51 |
1 files changed, 0 insertions, 51 deletions
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c index 1e3d60a..5241ef7 100644 --- a/drivers/ide/pci/cy82c693.c +++ b/drivers/ide/pci/cy82c693.c @@ -53,7 +53,6 @@ /* * The following are used to debug the driver. */ -#define CY82C693_DEBUG_LOGS 0 #define CY82C693_DEBUG_INFO 0 /* @@ -172,17 +171,6 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode) index = hwif->channel ? CY82_INDEX_CHANNEL1 : CY82_INDEX_CHANNEL0; -#if CY82C693_DEBUG_LOGS - /* for debug let's show the previous values */ - - outb(index, CY82_INDEX_PORT); - data = inb(CY82_DATA_PORT); - - printk(KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n", - drive->name, HWIF(drive)->channel, drive->select.b.unit, - (data&0x3), ((data>>2)&1)); -#endif /* CY82C693_DEBUG_LOGS */ - data = (mode & 3) | (single << 2); outb(index, CY82_INDEX_PORT); @@ -232,45 +220,6 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) } } -#if CY82C693_DEBUG_LOGS - /* for debug let's show the register values */ - - if (drive->select.b.unit == 0) { - /* - * get master drive registers - * address setup control register - * is 32 bit !!! - */ - pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); - addrCtrl &= 0x0F; - - /* now let's get the remaining registers */ - pci_read_config_byte(dev, CY82_IDE_MASTER_IOR, &pclk.time_16r); - pci_read_config_byte(dev, CY82_IDE_MASTER_IOW, &pclk.time_16w); - pci_read_config_byte(dev, CY82_IDE_MASTER_8BIT, &pclk.time_8); - } else { - /* - * set slave drive registers - * address setup control register - * is 32 bit !!! - */ - pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); - - addrCtrl &= 0xF0; - addrCtrl >>= 4; - - /* now let's get the remaining registers */ - pci_read_config_byte(dev, CY82_IDE_SLAVE_IOR, &pclk.time_16r); - pci_read_config_byte(dev, CY82_IDE_SLAVE_IOW, &pclk.time_16w); - pci_read_config_byte(dev, CY82_IDE_SLAVE_8BIT, &pclk.time_8); - } - - printk(KERN_INFO "%s (ch=%d, dev=%d): PIO timing is " - "(addr=0x%X, ior=0x%X, iow=0x%X, 8bit=0x%X)\n", - drive->name, hwif->channel, drive->select.b.unit, - addrCtrl, pclk.time_16r, pclk.time_16w, pclk.time_8); -#endif /* CY82C693_DEBUG_LOGS */ - /* let's calc the values for this PIO mode */ compute_clocks(pio, &pclk); |