summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorwangyuhang <wangyuhang2014@gmail.com>2013-09-01 09:36:21 (GMT)
committerMark Brown <broonie@linaro.org>2013-09-01 12:45:14 (GMT)
commita110f93d8b4672c4ad18d911f62b9e861010e83b (patch)
tree18c131e27442012a89f88f5db880d95a60e4dc1f
parenta822e99c70f448c4068ea85bb195dac0b2eb3afe (diff)
downloadlinux-fsl-qoriq-a110f93d8b4672c4ad18d911f62b9e861010e83b.tar.xz
spi: quad: fix the name of DT property
spi: quad: fix the name of DT property in patch The previous property name spi-tx-nbits and spi-rx-nbits looks not human-readable. To make it consistent with other devices, using property name spi-tx-bus-width and spi-rx-bus-width instead of the previous one specify the number of data wires that spi controller will work in. Add the specification in spi-bus.txt. Signed-off-by: wangyuhang <wangyuhang2014@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r--Documentation/devicetree/bindings/spi/spi-bus.txt10
-rw-r--r--drivers/spi/spi.c8
2 files changed, 14 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt
index 296015e..800dafe 100644
--- a/Documentation/devicetree/bindings/spi/spi-bus.txt
+++ b/Documentation/devicetree/bindings/spi/spi-bus.txt
@@ -55,6 +55,16 @@ contain the following properties.
chip select active high
- spi-3wire - (optional) Empty property indicating device requires
3-wire mode.
+- spi-tx-bus-width - (optional) The bus width(number of data wires) that
+ used for MOSI. Defaults to 1 if not present.
+- spi-rx-bus-width - (optional) The bus width(number of data wires) that
+ used for MISO. Defaults to 1 if not present.
+
+Some SPI controllers and devices support Dual and Quad SPI transfer mode.
+It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD).
+Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is
+only 1(SINGLE), 2(DUAL) and 4(QUAD).
+Dual/Quad mode is not allowed when 3-wire mode is used.
If a gpio chipselect is used for the SPI slave the gpio number will be passed
via the cs_gpio
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 7557f61..0075318 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -870,7 +870,7 @@ static void of_register_spi_devices(struct spi_master *master)
spi->mode |= SPI_3WIRE;
/* Device DUAL/QUAD mode */
- prop = of_get_property(nc, "spi-tx-nbits", &len);
+ prop = of_get_property(nc, "spi-tx-bus-width", &len);
if (prop && len == sizeof(*prop)) {
switch (be32_to_cpup(prop)) {
case SPI_NBITS_SINGLE:
@@ -883,14 +883,14 @@ static void of_register_spi_devices(struct spi_master *master)
break;
default:
dev_err(&master->dev,
- "spi-tx-nbits %d not supported\n",
+ "spi-tx-bus-width %d not supported\n",
be32_to_cpup(prop));
spi_dev_put(spi);
continue;
}
}
- prop = of_get_property(nc, "spi-rx-nbits", &len);
+ prop = of_get_property(nc, "spi-rx-bus-width", &len);
if (prop && len == sizeof(*prop)) {
switch (be32_to_cpup(prop)) {
case SPI_NBITS_SINGLE:
@@ -903,7 +903,7 @@ static void of_register_spi_devices(struct spi_master *master)
break;
default:
dev_err(&master->dev,
- "spi-rx-nbits %d not supported\n",
+ "spi-rx-bus-width %d not supported\n",
be32_to_cpup(prop));
spi_dev_put(spi);
continue;