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authorTudor Ambarus <tudor.ambarus@freescale.com>2014-04-24 15:15:59 (GMT)
committerMadalin-Cristian Bucur <madalin.bucur@freescale.com>2014-04-25 13:58:19 (GMT)
commitf72398865ebbbbca4c29e73a1dd765b1a53ce994 (patch)
tree25f1bf78f3a60f61e738171cc8c64bf67e26a2a3
parent5ea02732812d129c498658f5d161822803c14132 (diff)
downloadlinux-fsl-qoriq-f72398865ebbbbca4c29e73a1dd765b1a53ce994.tar.xz
crypto: caam - remove hardcoded offsets in tls10 encap descriptor
The Shared Descriptor's relative offsets vary depending on the keys length. Signed-off-by: Tudor Ambarus <tudor.ambarus@freescale.com> Change-Id: Iaf72d57ceb2c048057ca33a2bb5c9a02ca4680db Reviewed-on: http://git.am.freescale.net:8181/11470 Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
-rw-r--r--drivers/crypto/caam/caamalg.c28
1 files changed, 22 insertions, 6 deletions
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c
index c68f3eb..c41d284 100644
--- a/drivers/crypto/caam/caamalg.c
+++ b/drivers/crypto/caam/caamalg.c
@@ -634,7 +634,7 @@ static int tls_set_sh_desc(struct crypto_aead *aead)
struct device *jrdev = ctx->jrdev;
bool keys_fit_inline = false;
u32 *key_jump_cmd, *zero_payload_jump_cmd, *skip_zero_jump_cmd;
- u32 genpad, jumpback, stidx;
+ u32 genpad, idx_ld_datasz, idx_ld_pad, jumpback, stidx;
u32 *desc;
unsigned int blocksize = crypto_aead_blocksize(aead);
/* Associated data length is always = 13 for TLS */
@@ -648,11 +648,27 @@ static int tls_set_sh_desc(struct crypto_aead *aead)
* Job Descriptor and Shared Descriptor
* must fit into the 64-word Descriptor h/w Buffer
*/
+
+ /*
+ * Compute the index (in bytes) for the LOAD with destination of
+ * Class 1 Data Size Register and for the LOAD that generates padding
+ */
if (DESC_TLS10_ENC_LEN + DESC_JOB_IO_LEN +
ctx->split_key_pad_len + ctx->enckeylen <=
- CAAM_DESC_BYTES_MAX)
+ CAAM_DESC_BYTES_MAX) {
keys_fit_inline = true;
+ idx_ld_datasz = DESC_TLS10_ENC_LEN + ctx->split_key_pad_len +
+ ctx->enckeylen - 4 * CAAM_CMD_SZ;
+ idx_ld_pad = DESC_TLS10_ENC_LEN + ctx->split_key_pad_len +
+ ctx->enckeylen - 2 * CAAM_CMD_SZ;
+ } else {
+ idx_ld_datasz = DESC_TLS10_ENC_LEN + 2 * CAAM_PTR_SZ -
+ 4 * CAAM_CMD_SZ;
+ idx_ld_pad = DESC_TLS10_ENC_LEN + 2 * CAAM_PTR_SZ -
+ 2 * CAAM_CMD_SZ;
+ }
+
desc = ctx->sh_desc_enc;
stidx = 1 << HDR_START_IDX_SHIFT;
@@ -702,15 +718,15 @@ static int tls_set_sh_desc(struct crypto_aead *aead)
* for the LOAD in the class 1 data size register.
*/
append_move(desc, MOVE_SRC_DESCBUF | MOVE_DEST_MATH2 |
- (45 * 4 << MOVE_OFFSET_SHIFT) | 7);
+ (idx_ld_datasz << MOVE_OFFSET_SHIFT) | 7);
append_move(desc, MOVE_WAITCOMP | MOVE_SRC_MATH2 | MOVE_DEST_DESCBUF |
- (45 * 4 << MOVE_OFFSET_SHIFT) | 8);
+ (idx_ld_datasz << MOVE_OFFSET_SHIFT) | 8);
/* overwrite PL field for the padding iNFO FIFO entry */
append_move(desc, MOVE_SRC_DESCBUF | MOVE_DEST_MATH2 |
- (47 * 4 << MOVE_OFFSET_SHIFT) | 7);
+ (idx_ld_pad << MOVE_OFFSET_SHIFT) | 7);
append_move(desc, MOVE_WAITCOMP | MOVE_SRC_MATH2 | MOVE_DEST_DESCBUF |
- (47 * 4 << MOVE_OFFSET_SHIFT) | 8);
+ (idx_ld_pad << MOVE_OFFSET_SHIFT) | 8);
/* store encrypted payload, icv and padding */
append_seq_fifo_store(desc, 0, FIFOST_TYPE_MESSAGE_DATA | LDST_VLF);