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authorJiucheng Xu <Jiucheng.Xu@freescale.com>2012-08-28 15:34:09 (GMT)
committerFleming Andrew-AFLEMING <AFLEMING@freescale.com>2013-04-05 15:58:52 (GMT)
commit0743842c3871de32f81eaeb163b956d328981abe (patch)
tree8f1c4c11df24da2389d1e8dd5511096ec4e89d47 /Documentation
parent92803de1770b86ec51ddfc52cd482dfcd497f629 (diff)
downloadlinux-fsl-qoriq-0743842c3871de32f81eaeb163b956d328981abe.tar.xz
TDM: The device tree bindings for QE TDM.
Add tdm node's devicetreee binding to ucc, descrbe the new properties, add fsl pq-mds-t1 card's devicetree binding for TDM, Change-Id: If27bace105874c8e947d134d2932b1d5908fd0fb Signed-off-by: Jiucheng Xu <Jiucheng.Xu@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/899 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt43
-rw-r--r--Documentation/devicetree/bindings/tdm/pq-mds-t1.txt63
2 files changed, 104 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt
index e47734b..b1b569f 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt
@@ -2,8 +2,9 @@
Required properties:
- device_type : should be "network", "hldc", "uart", "transparent"
- "bisync", "atm", or "serial".
-- compatible : could be "ucc_geth" or "fsl_atm" and so on.
+ "bisync", "atm", "tdm" or "serial".
+- compatible : Describes the specific device attached to the UCC.
+ Examples include "ucc_geth", "fsl_atm", "ucc_uart" and "fsl,ucc-tdm".
- cell-index : the ucc number(1-8), corresponding to UCCx in UM.
- reg : Offset and length of the register set for the device
- interrupts : <a b> where a is the interrupt number and b is a
@@ -53,6 +54,24 @@ Recommended properties:
Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
"tbi", or "rtbi".
+Required properties for fsl, ucc-tdm, compatible:
+- fsl,rx-sync-clock, fsl,tx-sync-clock: the TDM sync clock source for
+ receive/transmit
+ "none": clock source is disabled
+ "rsync_pin" : clock source is TDM_A1 RSYNC pin
+ "brg9" through "brg15" : clock source is BRG9-BRG15, respectively
+- fsl,tdm-tx-timeslot, fsl,tdm-rx-timeslot: time slot mask for transmit/receive
+ Each bit (LSB first) corresponds to a time slot. The time slot is enabled
+ if the bit is set
+- fsl,tdm-id : It is the tdm port number. e.g. P1021E has 4 ports - port
+ A/B/C/D mapping to number 0/1/2/3.
+- fsl,tdm-framer-type : It should be "t1" or "e1", "t1" for T1 line rate, and
+ "e1" for E1 line rate
+- fsl,tdm-mode : It is tsa working mode. It should be "normal" or
+ "internal-loopback"
+- fsl,siram-entry-id : This number is used for setting index siram entry
+ It should be 0/2/4.../14. Each TDM should not use the same number
+ with others
Example:
ucc@2000 {
device_type = "network";
@@ -68,3 +87,23 @@ Example:
phy-connection-type = "gmii";
pio-handle = <140001>;
};
+
+ tdmc: ucc@2400 {
+ compatible = "fsl,ucc-tdm";
+ cell-index = <5>;
+ reg = <0x2400 0x200>;
+ interrupts = <40>;
+ interrupt-parent = <&qeic>;
+ rx-clock-name = "clk7";
+ tx-clock-name = "clk13";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot = <0x00ffffff>;
+ fsl,rx-timeslot = <0x00ffffff>;
+ pio-handle = <&pio_tdmc>;
+ fsl,tdm-framer-type = "t1";
+ fsl,tdm-mode = "normal";
+ fsl,tdm-id = <2>;
+ fsl,siram-entry-id = <4>;
+ phy-handle = <&tdmphy>;
+ };
diff --git a/Documentation/devicetree/bindings/tdm/pq-mds-t1.txt b/Documentation/devicetree/bindings/tdm/pq-mds-t1.txt
new file mode 100644
index 0000000..d5a9240
--- /dev/null
+++ b/Documentation/devicetree/bindings/tdm/pq-mds-t1.txt
@@ -0,0 +1,63 @@
+=====================================================================
+FSL PQ_MDS_T1 Device Tree Binding
+Copyright (C) 2012 Freescale Semiconductor Inc.
+
+=====================================================================
+Introduction
+
+The PQ-MDS-T1 - A board card with the T1/E1/DS3/T3/SLIC-SLAC module
+ which serves as a platform for S/W and H/W development
+ around the host device, it is connected by PMC sockets.
+
+1.TDM PHY
+ Function : DS26528 T1/E1/J1 transceiver
+
+Properties
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "fsl,pq-mds-t1".
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: The first reg specifier describes the the address,
+ and the second describes the length.
+ - line-rate
+ Usage: required
+ Value type: <string>
+ Definition: It descrbets the line rate "e1" or "t1". "e1" is 2.048MHz
+ "t1" is 1.544MHz.
+ - fsl,trans-mode
+ Usage: required
+ Value type: <string>
+ Definition: TDM controller transfer mode setting
+ Normal operation: set fsl,trans-mode = "normal". In this mode,
+ controller sends and receives data normally.
+ Loopback operation: set fsl,trans-mode = "internal-loopback".
+ In this mode, the data is sent via tsa tx pin and
+ received from tsa rx pin.
+Example
+
+ ds26528: tdm-phy@0 {
+ compatible = "dallas,ds26528";
+ reg = <0 0x2000>;
+ line-rate = "e1";
+ fsl,trans-mode = "normal";
+ };
+
+2.PQ-MDS-T1 PLD
+ Function: Board identification, control and clock/signal routing
+
+Properties
+ - fsl,card-support
+ Usage: required
+ Value type: <u32>
+ Definition: This property use phandle to describe which it serves as,
+ ds26528 or zarlink.
+
+Example
+ pld-reg@2000 {
+ compatible = "fsl,pq-mds-t1-pld";
+ reg = <0x2000 0x1000>;
+ fsl,card-support = <&ds26528>;
+ }