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authorArnd Bergmann <arnd@arndb.de>2012-01-07 12:44:37 (GMT)
committerArnd Bergmann <arnd@arndb.de>2012-01-07 20:40:51 (GMT)
commitb001befe58691ef3627458cd814e8cee7f845c5f (patch)
tree1083f1a1cd3feeceeac4b395534df0ff032fdbc8 /arch/arm/boot
parent31b2a868451d630bacfdeddc626371b3f9d9a01c (diff)
parent928a11ba36f999436915ea2b1eadf54301f93059 (diff)
downloadlinux-fsl-qoriq-b001befe58691ef3627458cd814e8cee7f845c5f.tar.xz
Merge branch 'samsung/dt' into next/dt
* samsung/dt: (3 commit) Merge branch 'depends/rmk/for-linus' into samsung/dt Merge branch 'depends/rmk/restart' into next/cleanup Merge branch 'next/cleanup' into samsung/dt Conflicts: arch/arm/mach-tegra/board-dt.c arch/arm/mach-tegra/include/mach/entry-macro.S The latest version of the samsung/dt branch resolves all sorts of conflicts with the latest upstream, no functional changes that are not already there. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/compressed/Makefile3
-rw-r--r--arch/arm/boot/compressed/head.S1
2 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 21f56ff..cf0a64c 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -126,7 +126,8 @@ ccflags-y := -fpic -fno-builtin -I$(obj)
asflags-y := -Wa,-march=all
# Supply kernel BSS size to the decompressor via a linker symbol.
-KBSS_SZ = $(shell size $(obj)/../../../../vmlinux | awk 'END{print $$3}')
+KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \
+ awk 'END{print $$3}')
LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ)
# Supply ZRELADDR to the decompressor via a linker symbol.
ifneq ($(CONFIG_AUTO_ZRELADDR),y)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index c2effc9..c5d6025 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -659,6 +659,7 @@ __armv7_mmu_cache_on:
mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
#endif
+ mcr p15, 0, r0, c7, c5, 4 @ ISB
mcr p15, 0, r0, c1, c0, 0 @ load control register
mrc p15, 0, r0, c1, c0, 0 @ and read it back
mov r0, #0