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authorLior Amsalem <alior@marvell.com>2013-04-08 22:52:11 (GMT)
committerJason Cooper <jason@lakedaemon.net>2013-04-15 14:06:59 (GMT)
commitda497f6fbaa190d34907ecc9dd85cfc62ba9f5a2 (patch)
tree8956f170acb39f9875b699759e28372eac413018 /arch/arm/mach-mvebu
parent99ff056193924005e650ab3f1719995c3ca82646 (diff)
downloadlinux-fsl-qoriq-da497f6fbaa190d34907ecc9dd85cfc62ba9f5a2.tar.xz
ARM: mvebu: Align the internal registers virtual base to support LPAE
In order to be able to support the LPAE, the internal registers virtual base must be aligned to 2MB. In LPAE section size is 2MB, in earlyprintk we map the internal registers and it must be section aligned. Signed-off-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mach-mvebu')
-rw-r--r--arch/arm/mach-mvebu/armada-370-xp.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mvebu/armada-370-xp.h b/arch/arm/mach-mvebu/armada-370-xp.h
index 9783087..2070e1b 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.h
+++ b/arch/arm/mach-mvebu/armada-370-xp.h
@@ -16,7 +16,7 @@
#define __MACH_ARMADA_370_XP_H
#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000
-#define ARMADA_370_XP_REGS_VIRT_BASE IOMEM(0xfeb00000)
+#define ARMADA_370_XP_REGS_VIRT_BASE IOMEM(0xfec00000)
#define ARMADA_370_XP_REGS_SIZE SZ_1M
/* These defines can go away once mvebu-mbus has a DT binding */