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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-02 03:22:01 (GMT)
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-02 03:22:01 (GMT)
commitcd9a0b6bd67ec372b0ef3cb2abe26974f888b956 (patch)
treeffec66aa48f95b2b764f9e84fbafc519cce5000e /arch/arm/mach-prima2/l2x0.c
parentac5761a650d22dd7dfad4d417463a0981d2da0a4 (diff)
parent090ad104c5c59c7952d4b8d4cfb60559b38eb3e0 (diff)
downloadlinux-fsl-qoriq-cd9a0b6bd67ec372b0ef3cb2abe26974f888b956.tar.xz
Merge branch 'next/pm' of git://git.linaro.org/people/arnd/arm-soc
* 'next/pm' of git://git.linaro.org/people/arnd/arm-soc: (66 commits) ARM: CSR: PM: use outer_resume to resume L2 cache ARM: CSR: call l2x0_of_init to init L2 cache of SiRFprimaII ARM: OMAP: voltage: voltage layer present, even when CONFIG_PM=n ARM: CSR: PM: add sleep entry for SiRFprimaII ARM: CSR: PM: save/restore irq status in suspend cycle ARM: CSR: PM: save/restore timer status in suspend cycle OMAP4: PM: TWL6030: add cmd register OMAP4: PM: TWL6030: fix ON/RET/OFF voltages OMAP4: PM: TWL6030: address 0V conversions OMAP4: PM: TWL6030: fix uv to voltage for >0x39 OMAP4: PM: TWL6030: fix voltage conversion formula omap: voltage: add a stub header file for external/regulator use OMAP2+: VC: more registers are per-channel starting with OMAP5 OMAP3+: voltage: update nominal voltage in voltdm_scale() not VC post-scale OMAP3+: voltage: rename omap_voltage_get_nom_volt -> voltdm_get_voltage OMAP3+: voltdm: final removal of omap_vdd_info OMAP3+: voltage: move/rename curr_volt from vdd_info into struct voltagedomain OMAP3+: voltage: rename scale and reset functions using voltdm_ prefix OMAP3+: VP: combine setting init voltage into common function OMAP3+: VP: remove unused omap_vp_get_curr_volt() ... Fix up trivial conflict in arch/arm/mach-prima2/l2x0.c (code removal vs edit)
Diffstat (limited to 'arch/arm/mach-prima2/l2x0.c')
-rw-r--r--arch/arm/mach-prima2/l2x0.c45
1 files changed, 9 insertions, 36 deletions
diff --git a/arch/arm/mach-prima2/l2x0.c b/arch/arm/mach-prima2/l2x0.c
index 66c6387e..c998377 100644
--- a/arch/arm/mach-prima2/l2x0.c
+++ b/arch/arm/mach-prima2/l2x0.c
@@ -8,51 +8,24 @@
#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/errno.h>
#include <linux/of.h>
-#include <linux/of_address.h>
#include <asm/hardware/cache-l2x0.h>
-#define L2X0_ADDR_FILTERING_START 0xC00
-#define L2X0_ADDR_FILTERING_END 0xC04
-
-static struct of_device_id l2x_ids[] = {
- { .compatible = "arm,pl310-cache" },
+static struct of_device_id prima2_l2x0_ids[] = {
+ { .compatible = "sirf,prima2-pl310-cache" },
+ {},
};
-static int __init sirfsoc_of_l2x_init(void)
+static int __init sirfsoc_l2x0_init(void)
{
struct device_node *np;
- void __iomem *sirfsoc_l2x_base;
-
- np = of_find_matching_node(NULL, l2x_ids);
- if (!np)
- panic("unable to find compatible l2x node in dtb\n");
-
- sirfsoc_l2x_base = of_iomap(np, 0);
- if (!sirfsoc_l2x_base)
- panic("unable to map l2x cpu registers\n");
-
- of_node_put(np);
-
- if (!(readl_relaxed(sirfsoc_l2x_base + L2X0_CTRL) & 1)) {
- /*
- * set the physical memory windows L2 cache will cover
- */
- writel_relaxed(PHYS_OFFSET + 1024 * 1024 * 1024,
- sirfsoc_l2x_base + L2X0_ADDR_FILTERING_END);
- writel_relaxed(PHYS_OFFSET | 0x1,
- sirfsoc_l2x_base + L2X0_ADDR_FILTERING_START);
- writel_relaxed(0,
- sirfsoc_l2x_base + L2X0_TAG_LATENCY_CTRL);
- writel_relaxed(0,
- sirfsoc_l2x_base + L2X0_DATA_LATENCY_CTRL);
+ np = of_find_matching_node(NULL, prima2_l2x0_ids);
+ if (np) {
+ pr_info("Initializing prima2 L2 cache\n");
+ return l2x0_of_init(0x40000, 0);
}
- l2x0_init((void __iomem *)sirfsoc_l2x_base, 0x00040000,
- 0x00000000);
return 0;
}
-early_initcall(sirfsoc_of_l2x_init);
+early_initcall(sirfsoc_l2x0_init);