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authorTony Lindgren <tony@atomide.com>2012-02-24 18:34:35 (GMT)
committerTony Lindgren <tony@atomide.com>2012-02-24 18:34:35 (GMT)
commit2c799cef4d145af2182594a41cb5e5b42f2535c5 (patch)
tree0d2f7e028e2b5e3c616243828d743b818d23c93a /arch/arm/plat-omap/include/plat/tc.h
parentee0839c22cdda7f2e5f06e2d0351e2b49e0975ff (diff)
downloadlinux-fsl-qoriq-2c799cef4d145af2182594a41cb5e5b42f2535c5.tar.xz
ARM: OMAP: Remove plat/io.h by splitting it into mach/io.h and mach/hardware.h
This is needed to minimize io.h so the SoC specific io.h for ARMs can removed. Note that minimal driver changes for DSS and RNG are needed to include cpu.h for SoC detection macros. Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Matt Mackall <mpm@selenic.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/include/plat/tc.h')
-rw-r--r--arch/arm/plat-omap/include/plat/tc.h19
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/arm/plat-omap/include/plat/tc.h b/arch/arm/plat-omap/include/plat/tc.h
index 83b850f..1b4b2da 100644
--- a/arch/arm/plat-omap/include/plat/tc.h
+++ b/arch/arm/plat-omap/include/plat/tc.h
@@ -84,25 +84,6 @@
#define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n)))
#define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n)))
-/* Almost all documentation for chip and board memory maps assumes
- * BM is clear. Most devel boards have a switch to control booting
- * from NOR flash (using external chipselect 3) rather than mask ROM,
- * which uses BM to interchange the physical CS0 and CS3 addresses.
- */
-#ifdef CONFIG_ARCH_OMAP1
-static inline u32 omap_cs0m_phys(void)
-{
- return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
- ? OMAP_CS3_PHYS : 0;
-}
-
-static inline u32 omap_cs3_phys(void)
-{
- return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
- ? 0 : OMAP_CS3_PHYS;
-}
-#endif
-
#endif /* __ASSEMBLER__ */
#endif /* __ASM_ARCH_TC_H */