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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-08-17 17:16:28 (GMT) |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-08-17 17:16:28 (GMT) |
| commit | 29c08460d472e427cec5e5dcb12ec74c923f8250 (patch) | |
| tree | 9d8557fe9cf123920c3ceb023274e763e5f208b0 /arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c | |
| parent | 9b2616c2e8cc98ca98bbb40cad83a8d3d859e840 (diff) | |
| parent | baa28e3530375e0bef2c53243634a1c78f5c02f3 (diff) | |
| download | linux-fsl-qoriq-29c08460d472e427cec5e5dcb12ec74c923f8250.tar.xz | |
Merge branch 'next-s3c' of git://aeryn.fluff.org.uk/bjdooks/linux into devel-stable
Diffstat (limited to 'arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c')
| -rw-r--r-- | arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c b/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c new file mode 100644 index 0000000..89fcf53 --- /dev/null +++ b/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c @@ -0,0 +1,38 @@ +/* linux/arch/arm/plat-s3c24xx/spi-bus0-gpd8_9_10.c + * + * Copyright (c) 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * S3C24XX SPI - gpio configuration for bus 1 on gpd8,9,10 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License. +*/ + +#include <linux/kernel.h> +#include <linux/gpio.h> + +#include <mach/spi.h> +#include <mach/regs-gpio.h> + +void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi, + int enable) +{ + + printk(KERN_INFO "%s(%d)\n", __func__, enable); + if (enable) { + s3c2410_gpio_cfgpin(S3C2410_GPD(10), S3C2440_GPD10_SPICLK1); + s3c2410_gpio_cfgpin(S3C2410_GPD(9), S3C2440_GPD9_SPIMOSI1); + s3c2410_gpio_cfgpin(S3C2410_GPD(8), S3C2440_GPD8_SPIMISO1); + s3c2410_gpio_pullup(S3C2410_GPD(10), 0); + s3c2410_gpio_pullup(S3C2410_GPD(9), 0); + } else { + s3c2410_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT); + s3c2410_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT); + s3c2410_gpio_pullup(S3C2410_GPD(10), 1); + s3c2410_gpio_pullup(S3C2410_GPD(9), 1); + s3c2410_gpio_pullup(S3C2410_GPD(8), 1); + } +} |