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author | Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | 2009-04-06 11:37:15 (GMT) |
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committer | Paul Mundt <lethal@linux-sh.org> | 2009-04-06 15:55:51 (GMT) |
commit | 9bb019f4c25a426deab26c9d1c67c8914bb4424f (patch) | |
tree | 2079b6fbb56f8fb64af4eab13a830149ba2caa72 /arch/sh/drivers/pci/ops-sh7785lcr.c | |
parent | 7fd87b3f1a6955da0a21b4fd99f8939701055172 (diff) | |
download | linux-fsl-qoriq-9bb019f4c25a426deab26c9d1c67c8914bb4424f.tar.xz |
sh: sh7785lcr: fix PCI address map for 32-bit mode
Fix the problem that cannot work PCI device on 32-bit mode because
influence of the commit 68b42d1b548be1840aff7122fdebeb804daf0fa3
("sh: sh7785lcr: Map whole PCI address space."). So this patch was
implement like a 29-bit mode, map whole physical address space of
DDR-SDRAM.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/pci/ops-sh7785lcr.c')
-rw-r--r-- | arch/sh/drivers/pci/ops-sh7785lcr.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/sh/drivers/pci/ops-sh7785lcr.c b/arch/sh/drivers/pci/ops-sh7785lcr.c index e8b7446..fb0869f 100644 --- a/arch/sh/drivers/pci/ops-sh7785lcr.c +++ b/arch/sh/drivers/pci/ops-sh7785lcr.c @@ -48,8 +48,13 @@ EXPORT_SYMBOL(board_pci_channels); static struct sh4_pci_address_map sh7785_pci_map = { .window0 = { +#if defined(CONFIG_32BIT) + .base = SH7780_32BIT_DDR_BASE_ADDR, + .size = 0x40000000, +#else .base = SH7780_CS0_BASE_ADDR, .size = 0x20000000, +#endif }, .flags = SH4_PCIC_NO_RESET, |