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| author | Shaveta Leekha <shaveta@freescale.com> | 2013-08-01 11:44:00 (GMT) |
|---|---|---|
| committer | Rivera Jose-B46482 <Jose.G.Rivera@freescale.com> | 2013-08-07 19:52:16 (GMT) |
| commit | 963ad71d782051f37f4bf7b937798d069a01ad3e (patch) | |
| tree | 5324e34e9a5cb9d6e32ed3c5277ee4cf05ab8973 /arch | |
| parent | b441fdd11651990ba285843c8de0fd81667861c6 (diff) | |
| download | linux-fsl-qoriq-963ad71d782051f37f4bf7b937798d069a01ad3e.tar.xz | |
powerpc/b4860: Add StarCore/SC3900 nodes in B4860 device files
- Add dsp nodes in B4860 pre silicon device file
- Add L2 cache nodes for dsp/Starcores in B4860 post silicon file
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Change-Id: I10329607b97961a44f46bc814032fc9faa0e7f96
Reviewed-on: http://git.am.freescale.net:8181/3693
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Sethi Varun-B16395 <Varun.Sethi@freescale.com>
Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
Tested-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/boot/dts/fsl/b4860si-post.dtsi | 18 | ||||
| -rw-r--r-- | arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi | 59 |
2 files changed, 77 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi index d2192e7..80d0f90 100644 --- a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi @@ -518,6 +518,24 @@ compatible = "fsl,b4860-l2-cache-controller"; }; + L2_2: l2-cache-controller@c60000 { + compatible = "fsl,b4860-l2-cache-controller"; + reg = <0xc60000 0x1000>; + next-level-cache = <&cpc>; + }; + + L2_3: l2-cache-controller@ca0000 { + compatible = "fsl,b4860-l2-cache-controller"; + reg = <0xca0000 0x1000>; + next-level-cache = <&cpc>; + }; + + L2_4: l2-cache-controller@ce0000 { + compatible = "fsl,b4860-l2-cache-controller"; + reg = <0xce0000 0x1000>; + next-level-cache = <&cpc>; + }; + /include/ "qoriq-rman-0.dtsi" rman: rman@1e0000 { fsl,qman-channels-id = <0x820 0x821>; diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi index 6c85eca..61f89b8 100644 --- a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi +++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi @@ -105,4 +105,63 @@ next-level-cache = <&L2>; }; }; + + dsp-clusters { + #address-cells = <1>; + #size-cells = <0>; + + dsp-cluster0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,sc3900-cluster"; + reg = <0>; + + dsp0: dsp@0 { + compatible = "fsl,sc3900"; + reg = <0>; + next-level-cache = <&L2_2>; + }; + dsp1: dsp@1 { + compatible = "fsl,sc3900"; + reg = <1>; + next-level-cache = <&L2_2>; + }; + }; + + dsp-cluster1 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,sc3900-cluster"; + reg = <1>; + + dsp2: dsp@2 { + compatible = "fsl,sc3900"; + reg = <2>; + next-level-cache = <&L2_2>; + }; + dsp3: dsp@3 { + compatible = "fsl,sc3900"; + reg = <3>; + next-level-cache = <&L2_2>; + }; + }; + + dsp-cluster2 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,sc3900-cluster"; + reg = <2>; + + dsp4: dsp@4 { + compatible = "fsl,sc3900"; + reg = <4>; + next-level-cache = <&L2_2>; + }; + dsp5: dsp@5 { + compatible = "fsl,sc3900"; + reg = <5>; + next-level-cache = <&L2_2>; + }; + }; + }; }; |