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authorChris Wilson <chris@chris-wilson.co.uk>2012-04-24 15:36:50 (GMT)
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-03 09:18:09 (GMT)
commitc7bd4c25650704d4d065eb4ce2a122d2a80ce804 (patch)
tree9b8503e4129e557dd6fa9e6024ade25fb4773aac /drivers/gpu/drm/i915/intel_display.c
parent7338aefa5cad08eb6794aa8e9a5853dedb990aa0 (diff)
downloadlinux-fsl-qoriq-c7bd4c25650704d4d065eb4ce2a122d2a80ce804.tar.xz
drm/i915: Remove too early plane enable on pre-PCH hardware
Enabling the plane before we have assigned valid address means that it will access random PTE (often with conflicting memory types) and cause GPU lockups. However, enabling the plane too early appears to workaround a number of bugs in our modesetting code. Cc: Franz Melchior <melchior.franz@gmail.com> References: https://bugs.freedesktop.org/show_bug.cgi?id=39947 References: https://bugs.freedesktop.org/show_bug.cgi?id=41091 References: https://bugs.freedesktop.org/show_bug.cgi?id=49041 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c5f071d..cf9dfcd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3932,7 +3932,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
I915_WRITE(DSPCNTR(plane), dspcntr);
POSTING_READ(DSPCNTR(plane));
- intel_enable_plane(dev_priv, plane, pipe);
ret = intel_pipe_set_base(crtc, x, y, old_fb);