summaryrefslogtreecommitdiff
path: root/drivers/gpu
diff options
context:
space:
mode:
authorAdam Jackson <ajax@redhat.com>2011-07-26 19:39:44 (GMT)
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-01-17 15:46:27 (GMT)
commit6919132e7a307b1f181d7655b3ef64cc7581a5ef (patch)
treeaadd73c9c48c794cfd9ebf1d8599d68275fa6df1 /drivers/gpu
parent1f182b27d50ae9f5efeb28be5b65302c8a81e711 (diff)
downloadlinux-fsl-qoriq-6919132e7a307b1f181d7655b3ef64cc7581a5ef.tar.xz
drm/i915/dp: Tweak auxch clock divider for PCH
Matches the advice in the Sandybridge documentation. Signed-off-by: Adam Jackson <ajax@redhat.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index db3b461..add8719 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -378,7 +378,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
else
aux_clock_divider = 225; /* eDP input clock at 450Mhz */
} else if (HAS_PCH_SPLIT(dev))
- aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */
+ aux_clock_divider = 63; /* IRL input clock fixed at 125Mhz */
else
aux_clock_divider = intel_hrawclk(dev) / 2;