diff options
| author | Vakul Garg <vakul@freescale.com> | 2013-05-22 11:09:23 (GMT) |
|---|---|---|
| committer | Fleming Andrew-AFLEMING <AFLEMING@freescale.com> | 2013-05-24 20:03:57 (GMT) |
| commit | 77597abefba2dff4dc4ad08cb703de91b33a877a (patch) | |
| tree | 061be024dd6441d8a82ea97d7b203684d3656138 /drivers/iommu | |
| parent | d5721ecea9b9a48f5af11ecfdb98c460e3789f0c (diff) | |
| download | linux-fsl-qoriq-77597abefba2dff4dc4ad08cb703de91b33a877a.tar.xz | |
powerpc/85xx: Enabled stashing of FMAN write data
This patch enables translation of FMAN write transactions into
write-with-stashing (to CPC) using IOMMU operation mapping mechanism.
This is required for USDPAA IPSEC application so that SEC is able to DMA
data faster and show better performance. On T4240, this patch shows up
20% performance gain for USDPAA IPSEC.
Change-Id: I17620c2ee44812adb5d02eee217f0ff2e9e85f67
Signed-off-by: Vakul Garg <vakul@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/2651
Reviewed-by: Sethi Varun-B16395 <Varun.Sethi@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Diffstat (limited to 'drivers/iommu')
| -rw-r--r-- | drivers/iommu/fsl_pamu.c | 31 |
1 files changed, 26 insertions, 5 deletions
diff --git a/drivers/iommu/fsl_pamu.c b/drivers/iommu/fsl_pamu.c index 102ecd9..6f32f6a 100644 --- a/drivers/iommu/fsl_pamu.c +++ b/drivers/iommu/fsl_pamu.c @@ -603,17 +603,22 @@ found_cpu_node: return ~(u32)0; } -/* Identify if the PAACT table entry belongs to QMAN, BMAN or QMAN Portal */ +/* + * Identify if the PAACT table entry belongs to QMAN, BMAN or QMAN Portal or + * FMAN ports + */ #define QMAN_PAACE 1 #define QMAN_PORTAL_PAACE 2 #define BMAN_PAACE 3 +#define FMAN_PAACE 4 /** * Setup operation mapping and stash destinations for QMAN and QMAN portal. + * Also set operation mapping and stash destinations for FMAN ports. * Memory accesses to QMAN and BMAN private memory need not be coherent, so * clear the PAACE entry coherency attribute for them. */ -static void setup_qbman_paace(struct paace *ppaace, int paace_type) +static void setup_dpaa_paace(struct paace *ppaace, int paace_type) { switch (paace_type) { case QMAN_PAACE: @@ -634,6 +639,13 @@ static void setup_qbman_paace(struct paace *ppaace, int paace_type) set_bf(ppaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR, 0); break; + case FMAN_PAACE: + set_bf(ppaace->impl_attr, PAACE_IA_OTM, PAACE_OTM_INDEXED); + ppaace->op_encode.index_ot.omi = OMI_FMAN; + /*Set frame stashing for the L3 cache */ + set_bf(ppaace->impl_attr, PAACE_IA_CID, + get_stash_id(IOMMU_ATTR_CACHE_L3, 0)); + break; } } @@ -661,7 +673,11 @@ static void __init setup_omt(struct ome *omt) /* Configure OMI_FMAN */ ome = &omt[OMI_FMAN]; ome->moe[IOE_READ_IDX] = EOE_VALID | EOE_READI; +#ifdef CONFIG_FSL_FMAN_CPC_STASH + ome->moe[IOE_WRITE_IDX] = EOE_VALID | EOE_WWSA; +#else ome->moe[IOE_WRITE_IDX] = EOE_VALID | EOE_WRITE; +#endif /* Configure OMI_QMAN private */ ome = &omt[OMI_QMAN_PRIV]; @@ -762,11 +778,16 @@ static void __init setup_liodns(void) set_bf(ppaace->addr_bitfields, PAACE_AF_AP, PAACE_AP_PERMS_ALL); if (of_device_is_compatible(node, "fsl,qman-portal")) - setup_qbman_paace(ppaace, QMAN_PORTAL_PAACE); + setup_dpaa_paace(ppaace, QMAN_PORTAL_PAACE); if (of_device_is_compatible(node, "fsl,qman")) - setup_qbman_paace(ppaace, QMAN_PAACE); + setup_dpaa_paace(ppaace, QMAN_PAACE); if (of_device_is_compatible(node, "fsl,bman")) - setup_qbman_paace(ppaace, BMAN_PAACE); + setup_dpaa_paace(ppaace, BMAN_PAACE); +#ifdef CONFIG_FSL_FMAN_CPC_STASH + if (of_device_is_compatible(node, "fsl,fman-port-10g-rx") || + of_device_is_compatible(node, "fsl,fman-port-1g-rx")) + setup_dpaa_paace(ppaace, FMAN_PAACE); +#endif mb(); pamu_enable_liodn(liodn); } |