diff options
author | Pavel Roskin <proski@gnu.org> | 2011-07-23 13:29:09 (GMT) |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-08-08 20:03:59 (GMT) |
commit | 32c254645f90a5a5486788c0deb30531fdb609c2 (patch) | |
tree | aea42daf095801158bc1177d4c9f8f3694d2e135 /drivers/net/wireless/ath/ath5k/phy.c | |
parent | 8d44a823c847c3d20e33c4c714ab48b700f41f14 (diff) | |
download | linux-fsl-qoriq-32c254645f90a5a5486788c0deb30531fdb609c2.tar.xz |
ath5k: eliminate CHANNEL_* macros, use AR5K_MODE_* in channel->hw_value
When checking for the band, use channel->band.
Change ath5k_hw_nic_wakeup() and ath5k_channel_ok() to take
ieee80211_channel. Change ath5k_hw_radio_revision() to take
ieee80211_band.
Signed-off-by: Pavel Roskin <proski@gnu.org>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Acked-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath5k/phy.c')
-rw-r--r-- | drivers/net/wireless/ath/ath5k/phy.c | 87 |
1 files changed, 49 insertions, 38 deletions
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c index b9ada88..227c914 100644 --- a/drivers/net/wireless/ath/ath5k/phy.c +++ b/drivers/net/wireless/ath/ath5k/phy.c @@ -38,7 +38,7 @@ /* * Get the PHY Chip revision */ -u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan) +u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, enum ieee80211_band band) { unsigned int i; u32 srev; @@ -47,11 +47,11 @@ u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan) /* * Set the radio chip access register */ - switch (chan) { - case CHANNEL_2GHZ: + switch (band) { + case IEEE80211_BAND_2GHZ: ath5k_hw_reg_write(ah, AR5K_PHY_SHIFT_2GHZ, AR5K_PHY(0)); break; - case CHANNEL_5GHZ: + case IEEE80211_BAND_5GHZ: ath5k_hw_reg_write(ah, AR5K_PHY_SHIFT_5GHZ, AR5K_PHY(0)); break; default: @@ -84,14 +84,16 @@ u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan) /* * Check if a channel is supported */ -bool ath5k_channel_ok(struct ath5k_hw *ah, u16 freq, unsigned int flags) +bool ath5k_channel_ok(struct ath5k_hw *ah, struct ieee80211_channel *channel) { + u16 freq = channel->center_freq; + /* Check if the channel is in our supported range */ - if (flags & CHANNEL_2GHZ) { + if (channel->band == IEEE80211_BAND_2GHZ) { if ((freq >= ah->ah_capabilities.cap_range.range_2ghz_min) && (freq <= ah->ah_capabilities.cap_range.range_2ghz_max)) return true; - } else if (flags & CHANNEL_5GHZ) + } else if (channel->band == IEEE80211_BAND_5GHZ) if ((freq >= ah->ah_capabilities.cap_range.range_5ghz_min) && (freq <= ah->ah_capabilities.cap_range.range_5ghz_max)) return true; @@ -224,7 +226,7 @@ static inline int ath5k_hw_write_ofdm_timings(struct ath5k_hw *ah, ds_coef_exp, ds_coef_man, clock; BUG_ON(!(ah->ah_version == AR5K_AR5212) || - !(channel->hw_value & CHANNEL_OFDM)); + (channel->hw_value == AR5K_MODE_11B)); /* Get coefficient * ALGO: coef = (5 * clock / carrier_freq) / 2 @@ -298,7 +300,7 @@ static void ath5k_hw_wait_for_synth(struct ath5k_hw *ah, u32 delay; delay = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) & AR5K_PHY_RX_DELAY_M; - delay = (channel->hw_value & CHANNEL_CCK) ? + delay = (channel->hw_value == AR5K_MODE_11B) ? ((delay << 2) / 22) : (delay / 10); if (ah->ah_bwmode == AR5K_BWMODE_10MHZ) delay = delay << 1; @@ -798,9 +800,9 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah, } /* Set Output and Driver bias current (OB/DB) */ - if (channel->hw_value & CHANNEL_2GHZ) { + if (channel->band == IEEE80211_BAND_2GHZ) { - if (channel->hw_value & CHANNEL_CCK) + if (channel->hw_value == AR5K_MODE_11B) ee_mode = AR5K_EEPROM_MODE_11B; else ee_mode = AR5K_EEPROM_MODE_11G; @@ -825,7 +827,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah, AR5K_RF_DB_2GHZ, true); /* RF5111 always needs OB/DB for 5GHz, even if we use 2GHz */ - } else if ((channel->hw_value & CHANNEL_5GHZ) || + } else if ((channel->band == IEEE80211_BAND_5GHZ) || (ah->ah_radio == AR5K_RF5111)) { /* For 11a, Turbo and XR we need to choose @@ -857,7 +859,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah, if (ah->ah_radio == AR5K_RF5111) { /* Set gain_F settings according to current step */ - if (channel->hw_value & CHANNEL_OFDM) { + if (channel->hw_value != AR5K_MODE_11B) { AR5K_REG_WRITE_BITS(ah, AR5K_PHY_FRAME_CTL, AR5K_PHY_FRAME_CTL_TX_CLIP, @@ -914,7 +916,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah, if (ah->ah_radio == AR5K_RF5112) { /* Set gain_F settings according to current step */ - if (channel->hw_value & CHANNEL_OFDM) { + if (channel->hw_value != AR5K_MODE_11B) { ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[0], AR5K_RF_MIXGAIN_OVR, true); @@ -1026,7 +1028,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah, } if (ah->ah_radio == AR5K_RF5413 && - channel->hw_value & CHANNEL_2GHZ) { + channel->band == IEEE80211_BAND_2GHZ) { ath5k_hw_rfb_op(ah, rf_regs, 1, AR5K_RF_DERBY_CHAN_SEL_MODE, true); @@ -1138,7 +1140,7 @@ static int ath5k_hw_rf5111_channel(struct ath5k_hw *ah, */ data0 = data1 = 0; - if (channel->hw_value & CHANNEL_2GHZ) { + if (channel->band == IEEE80211_BAND_2GHZ) { /* Map 2GHz channel to 5GHz Atheros channel ID */ ret = ath5k_hw_rf5111_chan2athchan( ieee80211_frequency_to_channel(channel->center_freq), @@ -1265,10 +1267,9 @@ static int ath5k_hw_channel(struct ath5k_hw *ah, int ret; /* * Check bounds supported by the PHY (we don't care about regulatory - * restrictions at this point). Note: hw_value already has the band - * (CHANNEL_2GHZ, or CHANNEL_5GHZ) so we inform ath5k_channel_ok() - * of the band by that */ - if (!ath5k_channel_ok(ah, channel->center_freq, channel->hw_value)) { + * restrictions at this point). + */ + if (!ath5k_channel_ok(ah, channel)) { ATH5K_ERR(ah, "channel frequency (%u MHz) out of supported " "band range\n", @@ -1614,7 +1615,7 @@ int ath5k_hw_phy_calibrate(struct ath5k_hw *ah, ret = ath5k_hw_rf511x_iq_calibrate(ah); if ((ah->ah_radio == AR5K_RF5111 || ah->ah_radio == AR5K_RF5112) && - (channel->hw_value & CHANNEL_OFDM)) + (channel->hw_value != AR5K_MODE_11B)) ath5k_hw_request_rfgain_probe(ah); return ret; @@ -1641,7 +1642,7 @@ ath5k_hw_set_spur_mitigation_filter(struct ath5k_hw *ah, /* Convert current frequency to fbin value (the same way channels * are stored on EEPROM, check out ath5k_eeprom_bin2freq) and scale * up by 2 so we can compare it later */ - if (channel->hw_value & CHANNEL_2GHZ) { + if (channel->band == IEEE80211_BAND_2GHZ) { chan_fbin = (channel->center_freq - 2300) * 10; freq_band = AR5K_EEPROM_BAND_2GHZ; } else { @@ -1703,7 +1704,7 @@ ath5k_hw_set_spur_mitigation_filter(struct ath5k_hw *ah, spur_freq_sigma_delta = (spur_delta_phase >> 10); symbol_width = AR5K_SPUR_SYMBOL_WIDTH_BASE_100Hz / 4; default: - if (channel->hw_value == CHANNEL_A) { + if (channel->band == IEEE80211_BAND_5GHZ) { /* Both sample_freq and chip_freq are 40MHz */ spur_delta_phase = (spur_offset << 17) / 25; spur_freq_sigma_delta = @@ -2226,15 +2227,20 @@ ath5k_get_chan_pcal_surrounding_piers(struct ath5k_hw *ah, idx_l = 0; idx_r = 0; - if (!(channel->hw_value & CHANNEL_OFDM)) { + switch (channel->hw_value) { + case AR5K_EEPROM_MODE_11A: + pcinfo = ee->ee_pwr_cal_a; + mode = AR5K_EEPROM_MODE_11A; + break; + case AR5K_EEPROM_MODE_11B: pcinfo = ee->ee_pwr_cal_b; mode = AR5K_EEPROM_MODE_11B; - } else if (channel->hw_value & CHANNEL_2GHZ) { + break; + case AR5K_EEPROM_MODE_11G: + default: pcinfo = ee->ee_pwr_cal_g; mode = AR5K_EEPROM_MODE_11G; - } else { - pcinfo = ee->ee_pwr_cal_a; - mode = AR5K_EEPROM_MODE_11A; + break; } max = ee->ee_n_piers[mode] - 1; @@ -2303,15 +2309,20 @@ ath5k_get_rate_pcal_data(struct ath5k_hw *ah, idx_l = 0; idx_r = 0; - if (!(channel->hw_value & CHANNEL_OFDM)) { + switch (channel->hw_value) { + case AR5K_MODE_11A: + rpinfo = ee->ee_rate_tpwr_a; + mode = AR5K_EEPROM_MODE_11A; + break; + case AR5K_MODE_11B: rpinfo = ee->ee_rate_tpwr_b; mode = AR5K_EEPROM_MODE_11B; - } else if (channel->hw_value & CHANNEL_2GHZ) { + break; + case AR5K_MODE_11G: + default: rpinfo = ee->ee_rate_tpwr_g; mode = AR5K_EEPROM_MODE_11G; - } else { - rpinfo = ee->ee_rate_tpwr_a; - mode = AR5K_EEPROM_MODE_11A; + break; } max = ee->ee_rate_target_pwr_num[mode] - 1; @@ -2392,20 +2403,20 @@ ath5k_get_max_ctl_power(struct ath5k_hw *ah, ctl_mode = ath_regd_get_band_ctl(regulatory, channel->band); - switch (channel->hw_value & CHANNEL_MODES) { - case CHANNEL_A: + switch (channel->hw_value) { + case AR5K_MODE_11A: if (ah->ah_bwmode == AR5K_BWMODE_40MHZ) ctl_mode |= AR5K_CTL_TURBO; else ctl_mode |= AR5K_CTL_11A; break; - case CHANNEL_G: + case AR5K_MODE_11G: if (ah->ah_bwmode == AR5K_BWMODE_40MHZ) ctl_mode |= AR5K_CTL_TURBOG; else ctl_mode |= AR5K_CTL_11G; break; - case CHANNEL_B: + case AR5K_MODE_11B: ctl_mode |= AR5K_CTL_11B; break; default: @@ -3290,7 +3301,7 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel, /* Write OFDM timings on 5212*/ if (ah->ah_version == AR5K_AR5212 && - channel->hw_value & CHANNEL_OFDM) { + channel->hw_value != AR5K_MODE_11B) { ret = ath5k_hw_write_ofdm_timings(ah, channel); if (ret) |