diff options
| author | Tomasz Figa <tomasz.figa@gmail.com> | 2013-03-18 21:31:52 (GMT) |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2013-04-09 07:41:09 (GMT) |
| commit | 499147c9dbceee27c63bf8e6b604aca1737e9e0c (patch) | |
| tree | 54305db6aac8a73a8e495f98b1f0f82886e3af53 /drivers/pinctrl/pinctrl-exynos.h | |
| parent | d5517bec272ce4732f7e86a72a1bb815834c912c (diff) | |
| download | linux-fsl-qoriq-499147c9dbceee27c63bf8e6b604aca1737e9e0c.tar.xz | |
pinctrl: samsung: Split pin bank description into two structures
This patch splits pin bank description into two structures, one
describing bank type (currently only bitfield widths), which can be
shared across multiple banks and second containing bank-specific
parameters including a pointer to a bank type struct.
It is a prerequisite for further patch removing the statically hardcoded
register offsets, making it impossible to support SoCs with different
set and order of pin control registers.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-exynos.h')
| -rw-r--r-- | drivers/pinctrl/pinctrl-exynos.h | 16 |
1 files changed, 3 insertions, 13 deletions
diff --git a/drivers/pinctrl/pinctrl-exynos.h b/drivers/pinctrl/pinctrl-exynos.h index 0a70889..9b1f77a 100644 --- a/drivers/pinctrl/pinctrl-exynos.h +++ b/drivers/pinctrl/pinctrl-exynos.h @@ -48,26 +48,18 @@ #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \ { \ + .type = &bank_type_off, \ .pctl_offset = reg, \ .nr_pins = pins, \ - .func_width = 4, \ - .pud_width = 2, \ - .drv_width = 2, \ - .conpdn_width = 2, \ - .pudpdn_width = 2, \ .eint_type = EINT_TYPE_NONE, \ .name = id \ } #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \ { \ + .type = &bank_type_off, \ .pctl_offset = reg, \ .nr_pins = pins, \ - .func_width = 4, \ - .pud_width = 2, \ - .drv_width = 2, \ - .conpdn_width = 2, \ - .pudpdn_width = 2, \ .eint_type = EINT_TYPE_GPIO, \ .eint_offset = offs, \ .name = id \ @@ -75,11 +67,9 @@ #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \ { \ + .type = &bank_type_alive, \ .pctl_offset = reg, \ .nr_pins = pins, \ - .func_width = 4, \ - .pud_width = 2, \ - .drv_width = 2, \ .eint_type = EINT_TYPE_WKUP, \ .eint_offset = offs, \ .name = id \ |