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authorRadu Bulie <radu.bulie@freescale.com>2013-05-17 11:22:02 (GMT)
committerFleming Andrew-AFLEMING <AFLEMING@freescale.com>2013-05-17 19:38:37 (GMT)
commitf4cfc8dfdd01e41386bec86a5aca96c6dff414a4 (patch)
tree41d1f03dc342ef9b64a1578c31f5aae043182f86 /drivers/staging/fsl_dpa_offload/dts
parent55f7fa430aa3ef6efcdc226340a10a728ea0dd79 (diff)
downloadlinux-fsl-qoriq-f4cfc8dfdd01e41386bec86a5aca96c6dff414a4.tar.xz
dpa_offload: Add dtsi files for chosen node support on P4080 platform
The patch adds the dtsi files used for enabling chosen node support for P4080 platform. Chosen node support permits to configure features such as: -fragmentation on O/H port -set TNUMS and buffer configuration parameters on different ports Signed-off-by: Radu Bulie <radu.bulie@freescale.com> Change-Id: I6718ae3f51515ed35b0748476916087ce131ac57 Reviewed-on: http://git.am.freescale.net:8181/2577 Reviewed-by: Chereji Marian-Cornel-R27762 <marian.chereji@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Diffstat (limited to 'drivers/staging/fsl_dpa_offload/dts')
-rw-r--r--drivers/staging/fsl_dpa_offload/dts/p4080si-chosen-offld.dtsi20
-rw-r--r--drivers/staging/fsl_dpa_offload/dts/p4080si-pre.dtsi162
2 files changed, 182 insertions, 0 deletions
diff --git a/drivers/staging/fsl_dpa_offload/dts/p4080si-chosen-offld.dtsi b/drivers/staging/fsl_dpa_offload/dts/p4080si-chosen-offld.dtsi
new file mode 100644
index 0000000..32e5689
--- /dev/null
+++ b/drivers/staging/fsl_dpa_offload/dts/p4080si-chosen-offld.dtsi
@@ -0,0 +1,20 @@
+chosen {
+ name = "chosen";
+
+ dpaa-extended-args {
+ fman1-extd-args {
+ cell-index = <1>;
+ compatible = "fsl,fman-extended-args";
+ dma-aid-mode = "port";
+ fman1_oh2-extd-args {
+ cell-index = <2>;
+ compatible = "fsl,fman-port-op-extended-args";
+ /* Define buffer layout parameters. Can be used
+ * in fragmentation or header manip operations
+ */
+ /* <manip extra space, data alignment> */
+ buffer-layout = <128 64>;
+ };
+ };
+ };
+};
diff --git a/drivers/staging/fsl_dpa_offload/dts/p4080si-pre.dtsi b/drivers/staging/fsl_dpa_offload/dts/p4080si-pre.dtsi
new file mode 100644
index 0000000..9945479
--- /dev/null
+++ b/drivers/staging/fsl_dpa_offload/dts/p4080si-pre.dtsi
@@ -0,0 +1,162 @@
+/*
+ * P4080/P4040 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+/include/ "e500mc_power_isa.dtsi"
+
+/ {
+ compatible = "fsl,P4080";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ aliases {
+ ccsr = &soc;
+ dcsr = &dcsr;
+
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ pci2 = &pci2;
+ usb0 = &usb0;
+ usb1 = &usb1;
+ dma0 = &dma0;
+ dma1 = &dma1;
+ sdhc = &sdhc;
+ msi0 = &msi0;
+ msi1 = &msi1;
+ msi2 = &msi2;
+
+ crypto = &crypto;
+ sec_jr0 = &sec_jr0;
+ sec_jr1 = &sec_jr1;
+ sec_jr2 = &sec_jr2;
+ sec_jr3 = &sec_jr3;
+ rtic_a = &rtic_a;
+ rtic_b = &rtic_b;
+ rtic_c = &rtic_c;
+ rtic_d = &rtic_d;
+ sec_mon = &sec_mon;
+
+ pme = &pme;
+ qman = &qman;
+ bman = &bman;
+ fman0 = &fman0;
+ fman1 = &fman1;
+ };
+
+/include/ "p4080si-chosen.dtsi"
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: PowerPC,e500mc@0 {
+ device_type = "cpu";
+ reg = <0>;
+ clocks = <&mux0>;
+ next-level-cache = <&L2_0>;
+ L2_0: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ cpu1: PowerPC,e500mc@1 {
+ device_type = "cpu";
+ reg = <1>;
+ clocks = <&mux1>;
+ next-level-cache = <&L2_1>;
+ L2_1: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ cpu2: PowerPC,e500mc@2 {
+ device_type = "cpu";
+ reg = <2>;
+ clocks = <&mux2>;
+ next-level-cache = <&L2_2>;
+ L2_2: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ cpu3: PowerPC,e500mc@3 {
+ device_type = "cpu";
+ reg = <3>;
+ clocks = <&mux3>;
+ next-level-cache = <&L2_3>;
+ L2_3: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ cpu4: PowerPC,e500mc@4 {
+ device_type = "cpu";
+ reg = <4>;
+ clocks = <&mux4>;
+ next-level-cache = <&L2_4>;
+ L2_4: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ cpu5: PowerPC,e500mc@5 {
+ device_type = "cpu";
+ reg = <5>;
+ clocks = <&mux5>;
+ next-level-cache = <&L2_5>;
+ L2_5: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ cpu6: PowerPC,e500mc@6 {
+ device_type = "cpu";
+ reg = <6>;
+ clocks = <&mux6>;
+ next-level-cache = <&L2_6>;
+ L2_6: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ cpu7: PowerPC,e500mc@7 {
+ device_type = "cpu";
+ reg = <7>;
+ clocks = <&mux7>;
+ next-level-cache = <&L2_7>;
+ L2_7: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ };
+};