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authorRamneek Mehresh <ramneek.mehresh@freescale.com>2013-05-02 10:06:04 (GMT)
committerFleming Andrew-AFLEMING <AFLEMING@freescale.com>2013-05-07 20:18:38 (GMT)
commitb6279955ee8f5fbad4347b1610e9caddd0fb6081 (patch)
treeac3c6a3f3d4db9afc786e13dcee8081596e1a397 /drivers/usb
parent6678570af75fbb7955adb70b372e7305e6280002 (diff)
downloadlinux-fsl-qoriq-b6279955ee8f5fbad4347b1610e9caddd0fb6081.tar.xz
fsl/usb: Resolve PHY_CLK_VLD instability issue for ULPI phy
For controller versions greater than 1.6, setting ULPI_PHY_CLK_SEL bit when USB_EN bit is already set causes instability issues with PHY_CLK_VLD bit. So USB_EN is set only for IP controller version below 1.6 before setting ULPI_PHY_CLK_SEL bit Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Change-Id: I2fe723371dfb0a1993c58b8f3594a967ebd8c2b5 Reviewed-on: http://git.am.freescale.net:8181/2345 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Diffstat (limited to 'drivers/usb')
-rw-r--r--drivers/usb/host/ehci-fsl.c12
1 files changed, 3 insertions, 9 deletions
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 732bc43..8195bd0 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -179,7 +179,7 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver,
}
/* Enable USB controller, 83xx or 8536 */
- if (pdata->have_sysif_regs)
+ if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6)
setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
/* Don't need to set host mode here. It will be done by tdi_reset() */
@@ -290,15 +290,9 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
case FSL_USB2_PHY_ULPI:
if (pdata->have_sysif_regs && pdata->controller_ver) {
/* controller version 1.6 or above */
+ clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
setbits32(non_ehci + FSL_SOC_USB_CTRL,
- ULPI_PHY_CLK_SEL);
- /*
- * Due to controller issue of PHY_CLK_VALID in ULPI
- * mode, we set USB_CTRL_USB_EN before checking
- * PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work.
- */
- clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
- UTMI_PHY_EN, USB_CTRL_USB_EN);
+ ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
}
portsc |= PORT_PTS_ULPI;
break;