diff options
author | Radu Bulie <radu.bulie@freescale.com> | 2013-05-17 11:07:28 (GMT) |
---|---|---|
committer | Fleming Andrew-AFLEMING <AFLEMING@freescale.com> | 2013-05-17 19:36:56 (GMT) |
commit | 55f7fa430aa3ef6efcdc226340a10a728ea0dd79 (patch) | |
tree | c6b1a3dcf3108200de8f57c85325935fa752ba62 /drivers | |
parent | 6b0649d0274948d08507e701856587683ac1167b (diff) | |
download | linux-fsl-qoriq-55f7fa430aa3ef6efcdc226340a10a728ea0dd79.tar.xz |
dpa_offload: Add dts files for B4420 platform support in DPA offload
This patch adds the dts files for B4420 support
Signed-off-by: Radu Bulie <radu.bulie@freescale.com>
Change-Id: Ibcae2a79f0b514a794dedb4da9504510365f79eb
Reviewed-on: http://git.am.freescale.net:8181/2576
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Chereji Marian-Cornel-R27762 <marian.chereji@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Diffstat (limited to 'drivers')
5 files changed, 425 insertions, 0 deletions
diff --git a/drivers/staging/fsl_dpa_offload/dts/b4420qds-usdpaa-shared-interfaces.dts b/drivers/staging/fsl_dpa_offload/dts/b4420qds-usdpaa-shared-interfaces.dts new file mode 100644 index 0000000..815703c --- /dev/null +++ b/drivers/staging/fsl_dpa_offload/dts/b4420qds-usdpaa-shared-interfaces.dts @@ -0,0 +1,149 @@ +/* + * B4420QDS Device Tree Source + * + * Copyright 2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/include/ "b4420qds.dts" + +/ { + /* NB: "bpool-ethernet-seeds" is not set to avoid buffer seeding, + * because apps seed these pools with buffers allocated at + * run-time. + * HOWEVER, the kernel driver requires the buffer-size so + * "fsl,bpool-ethernet-cfg" is set. It also mis-interprets + * things if the base-address is zero (hence the 0xdeadbeef + * values). + */ + bp7: buffer-pool@7 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <7>; + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>; + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; + }; + bp8: buffer-pool@8 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <8>; + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + }; + bp9: buffer-pool@9 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <9>; + fsl,bpool-ethernet-cfg = <0 0 0 1728 0 0xfeedabba>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + }; + + bp10: buffer-pool@10 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <10>; + fsl,bpool-thresholds = <0x10 0x30 0x0 0x0>; + }; + bp11: buffer-pool@11 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <11>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + }; + bp12: buffer-pool@12 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <12>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + }; + + bp16: buffer-pool@16 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <16>; + fsl,bpool-ethernet-cfg = <0 2048 0 1728 0 0>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + }; + + + fsl,dpaa { + ethernet@0 { + compatible = "fsl,b4420-dpa-ethernet-init", "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>; + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>; + }; + ethernet@1 { + compatible = "fsl,b4420-dpa-ethernet-init", "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>; + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>; + }; + ethernet@2 { + compatible = "fsl,b4420-dpa-ethernet-init", "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>; + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>; + }; + ethernet@3 { + compatible = "fsl,b4420-dpa-ethernet-init", "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp16>; + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>; + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>; + }; + + /* ethernet@16 declared as MAC-less interface with no "fsl,fman-mac" property. + * USDPAA will seed buffers to this buffer pool and initialize 8 TX Frame + * queues. The ethernet driver will initialize 8 RX default Frame queues. + * On receiving frame at this interface, the ethernet driver will do + * kmap_atomic/kunmap_atomic for that frame. */ + ethernet@16 { + compatible = "fsl,b4420-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,bman-buffer-pools = <&bp16>; + fsl,qman-frame-queues-rx = <4000 8>; + fsl,qman-frame-queues-tx = <4008 8>; + local-mac-address = [00 11 22 33 44 55]; + }; + + dpa-fman0-oh@2 { + compatible = "fsl,dpa-oh"; + /* Define frame queues for the OH port*/ + /* <OH Rx error, OH Rx default> */ + fsl,qman-frame-queues-oh = <0x6e 1 0x6f 1>; + fsl,bman-buffer-pools = <&bp9>; + fsl,fman-oh-port = <&fman0_oh2>; + }; + dpa_fman0_oh3: dpa-fman0-oh@3 { + compatible = "fsl,dpa-oh"; + fsl,qman-frame-queues-oh = <0x68 1 0x69 1>; + fsl,bman-buffer-pools = <&bp9>; + fsl,fman-oh-port = <&fman0_oh3>; + }; + dpa_fman0_oh4: dpa-fman0-oh@4 { + compatible = "fsl,dpa-oh"; + fsl,qman-frame-queues-oh = <0x70 1 0x71 1>; + fsl,bman-buffer-pools = <&bp9>; + fsl,fman-oh-port = <&fman0_oh4>; + }; + }; +}; diff --git a/drivers/staging/fsl_dpa_offload/dts/b4420qds-usdpaa.dts b/drivers/staging/fsl_dpa_offload/dts/b4420qds-usdpaa.dts new file mode 100644 index 0000000..4cb9c2e --- /dev/null +++ b/drivers/staging/fsl_dpa_offload/dts/b4420qds-usdpaa.dts @@ -0,0 +1,127 @@ +/* + * B4420QDS Device Tree Source + * + * Copyright 2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/include/ "b4420qds.dts" + +/ { + /* NB: "bpool-ethernet-seeds" is not set to avoid buffer seeding, + * because apps seed these pools with buffers allocated at + * run-time. + * HOWEVER, the kernel driver requires the buffer-size so + * "fsl,bpool-ethernet-cfg" is set. It also mis-interprets + * things if the base-address is zero (hence the 0xdeadbeef + * values). + */ + bp7: buffer-pool@7 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <7>; + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>; + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; + }; + bp8: buffer-pool@8 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <8>; + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + }; + bp9: buffer-pool@9 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <9>; + fsl,bpool-ethernet-cfg = <0 0 0 1728 0 0xfeedabba>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + }; + + bp10: buffer-pool@10 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <10>; + fsl,bpool-thresholds = <0x10 0x30 0x0 0x0>; + }; + bp11: buffer-pool@11 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <11>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + }; + bp12: buffer-pool@12 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <12>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + }; + + fsl,dpaa { + ethernet@0 { + compatible = "fsl,b4420-dpa-ethernet-init", "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>; + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>; + }; + ethernet@1 { + compatible = "fsl,b4420-dpa-ethernet-init", "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>; + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>; + }; + ethernet@2 { + compatible = "fsl,b4420-dpa-ethernet-init", "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>; + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>; + }; + ethernet@3 { + compatible = "fsl,b4420-dpa-ethernet-init", "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>; + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>; + }; + dpa-fman0-oh@2 { + compatible = "fsl,dpa-oh"; + /* Define frame queues for the OH port*/ + /* <OH Rx error, OH Rx default> */ + fsl,qman-frame-queues-oh = <0x6e 1 0x6f 1>; + fsl,bman-buffer-pools = <&bp9>; + fsl,fman-oh-port = <&fman0_oh2>; + }; + dpa_fman0_oh3: dpa-fman0-oh@3 { + compatible = "fsl,dpa-oh"; + fsl,qman-frame-queues-oh = <0x68 1 0x69 1>; + fsl,bman-buffer-pools = <&bp9>; + fsl,fman-oh-port = <&fman0_oh3>; + }; + dpa_fman0_oh4: dpa-fman0-oh@4 { + compatible = "fsl,dpa-oh"; + fsl,qman-frame-queues-oh = <0x70 1 0x71 1>; + fsl,bman-buffer-pools = <&bp9>; + fsl,fman-oh-port = <&fman0_oh4>; + }; + }; +}; diff --git a/drivers/staging/fsl_dpa_offload/dts/b4420si-chosen-offld.dtsi b/drivers/staging/fsl_dpa_offload/dts/b4420si-chosen-offld.dtsi new file mode 100644 index 0000000..b47d8fb --- /dev/null +++ b/drivers/staging/fsl_dpa_offload/dts/b4420si-chosen-offld.dtsi @@ -0,0 +1,29 @@ +chosen { + name = "chosen"; + + dpaa-extended-args { + fman0-extd-args { + cell-index = <0>; + compatible = "fsl,fman-extended-args"; + dma-aid-mode = "port"; + /* Inbound O/H post decryption */ + fman0_oh2-extd-args { + cell-index = <1>; + compatible = "fsl,fman-port-op-extended-args"; + /* Define Virtual storage profile */ + /* <number of profiles, default profile id> */ + vsp-window = <8 0>; + }; + /* Outbound O/H pre encryption */ + fman0_oh3-extd-args { + cell-index = <2>; + compatible = "fsl,fman-port-op-extended-args"; + /* Define buffer layout parameters. Can be used + * in fragmentation or header manip operations + */ + /* <manip extra space, data alignment> */ + buffer-layout = <128 64>; + }; + }; + }; +}; diff --git a/drivers/staging/fsl_dpa_offload/dts/b4420si-chosen-reass.dtsi b/drivers/staging/fsl_dpa_offload/dts/b4420si-chosen-reass.dtsi new file mode 100644 index 0000000..9d65380 --- /dev/null +++ b/drivers/staging/fsl_dpa_offload/dts/b4420si-chosen-reass.dtsi @@ -0,0 +1,27 @@ +chosen { + name = "chosen"; + + dpaa-extended-args { + fman0-extd-args { + cell-index = <0>; + compatible = "fsl,fman-extended-args"; + dma-aid-mode = "port"; + fman0_rx3-extd-args { + cell-index = <3>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + /* Define Virtual storage profile */ + /* <number of profiles, default profile id> */ + vsp-window = <8 0>; + }; + fman0_oh2-extd-args { + cell-index = <1>; + compatible = "fsl,fman-port-op-extended-args"; + /* Define buffer layout parameters. Can be used + * in fragmentation or header manip operations + */ + /* <manip extra space, data alignment> */ + buffer-layout = <128 64>; + }; + }; + }; +}; diff --git a/drivers/staging/fsl_dpa_offload/dts/b4420si-pre.dtsi b/drivers/staging/fsl_dpa_offload/dts/b4420si-pre.dtsi new file mode 100644 index 0000000..cc7cf06 --- /dev/null +++ b/drivers/staging/fsl_dpa_offload/dts/b4420si-pre.dtsi @@ -0,0 +1,93 @@ +/* + * B4420 Silicon/SoC Device Tree Source (pre include) + * + * Copyright 2012 Freescale Semiconductor, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * This software is provided by Freescale Semiconductor "as is" and any + * express or implied warranties, including, but not limited to, the implied + * warranties of merchantability and fitness for a particular purpose are + * disclaimed. In no event shall Freescale Semiconductor be liable for any + * direct, indirect, incidental, special, exemplary, or consequential damages + * (including, but not limited to, procurement of substitute goods or services; + * loss of use, data, or profits; or business interruption) however caused and + * on any theory of liability, whether in contract, strict liability, or tort + * (including negligence or otherwise) arising in any way out of the use of + * this software, even if advised of the possibility of such damage. + */ + +/dts-v1/; + +/include/ "e6500_power_isa.dtsi" + +/ { + compatible = "fsl,B4420"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + aliases { + ccsr = &soc; + dcsr = &dcsr; + + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + + crypto = &crypto; + qman = &qman; + bman = &bman; + fman0 = &fman0; + ethernet0 = &fm1mac1; + ethernet1 = &fm1mac2; + ethernet2 = &fm1mac3; + ethernet3 = &fm1mac4; + + pci0 = &pci0; + usb0 = &usb0; + dma0 = &dma0; + dma1 = &dma1; + sdhc = &sdhc; + }; + +/include/ "b4420si-chosen.dtsi" + cpus { + #address-cells = <1>; + #size-cells = <0>; + + /* + * Temporarily add next-level-cache info in each cpu node so + * that uboot can do L2 cache fixup. This can be removed once + * u-boot can create cpu node with cache info. + */ + cpu0: PowerPC,e6500@0 { + device_type = "cpu"; + reg = <0 1>; + clocks = <&mux0>; + next-level-cache = <&L2>; + }; + cpu1: PowerPC,e6500@2 { + device_type = "cpu"; + reg = <2 3>; + clocks = <&mux0>; + next-level-cache = <&L2>; + }; + }; +}; |