crypto: caam - Enabled QI Support for SEC

At the time of merging few changes required for enabling QI support
were missed. This patch adds those missing changes and hence enables QI
support for SEC.

Signed-off-by: Nitesh Lal <NiteshNarayanLal@freescale.com>
Change-Id: I190ed1452317cb1f70faaf85f8a69be0a0c5a376
Reviewed-on: http://git.am.freescale.net:8181/9922
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>

4 files changed, 41 insertions, 0 deletions

diff --git a/drivers/crypto/caam/Kconfig b/drivers/crypto/caam/Kconfig
index 97927a5..0bb8112 100644
--- a/drivers/crypto/caam/Kconfig
+++ b/drivers/crypto/caam/Kconfig
@@ -87,6 +87,25 @@ config CRYPTO_DEV_FSL_CAAM_CRYPTO_API
 	  To compile this as a module, choose M here: the module
 	  will be called caamalg.
 
+config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI
+        tristate "Queue Interface as Crypto API backend"
+        depends on CRYPTO_DEV_FSL_CAAM_CRYPTO_API && FSL_QMAN
+        default y
+        help
+          Selecting this will use SEC Queue Interface for sending
+          & receiving crypto jobs to/from SEC. This gives better
+          performance than job ring interface when the number of
+          cores are more than the number of job rings assigned to
+          the kernel. The number of portals assigned to the kernel
+          should also be more than the number of job rings.
+
+          Currently, only AEAD algorithms have been implemented on
+          top of SEC-QI backend interface. The rest of the algorithms
+          use job ring interface.
+
+          To compile this as a module, choose M here: the module
+          will be called caamalg_qi.
+
 config CRYPTO_DEV_FSL_CAAM_AHASH_API
 	tristate "Register hash algorithm implementations with Crypto API"
 	depends on CRYPTO_DEV_FSL_CAAM && CRYPTO_DEV_FSL_CAAM_JR
diff --git a/drivers/crypto/caam/Makefile b/drivers/crypto/caam/Makefile
index 2252efd..464fde5 100644
--- a/drivers/crypto/caam/Makefile
+++ b/drivers/crypto/caam/Makefile
@@ -14,3 +14,8 @@ obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_JR_UIO) += fsl_jr_uio.o
 
 caam-objs := ctrl.o
 caam_jr-objs := jr.o key_gen.o error.o
+ifeq ($(CONFIG_FSL_QMAN), y)
+        caam-objs += qi.o
+endif
+
+obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI) += caamalg_qi.o
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index ebb5617..ef249a5 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -15,6 +15,10 @@
 #include "desc_constr.h"
 #include "error.h"
 
+#ifdef CONFIG_FSL_QMAN
+#include "qi.h"
+#endif
+
 /*
  * Descriptor to instantiate RNG State Handle 0 in normal mode and
  * load the JDKEK, TDKEK and TDSK registers
@@ -283,6 +287,10 @@ static int caam_remove(struct platform_device *pdev)
 			of_device_unregister(ctrlpriv->jrpdev[ring]);
 	}
 
+#ifdef CONFIG_FSL_QMAN
+	if (ctrlpriv->qidev)
+		caam_qi_shutdown(ctrlpriv->qidev);
+#endif
 	/* De-initialize RNG state handles initialized by this driver. */
 	if (ctrlpriv->rng4_sh_init)
 		deinstantiate_rng(ctrldev, ctrlpriv->rng4_sh_init);
@@ -475,6 +483,12 @@ static int caam_probe(struct platform_device *pdev)
 		ctrlpriv->qi = (struct caam_queue_if __force *)&topregs->qi;
 		/* This is all that's required to physically enable QI */
 		wr_reg32(&topregs->qi.qi_control_lo, QICTL_DQEN);
+
+		/* If QMAN driver is present, init CAAM-QI backend */
+#ifdef CONFIG_FSL_QMAN
+		if (caam_qi_init(pdev, nprop))
+			dev_err(dev, "caam qi i/f init failed\n");
+#endif
 	}
 
 	/* If no QI and no rings specified, quit and go home */
diff --git a/drivers/crypto/caam/intern.h b/drivers/crypto/caam/intern.h
index 4ca6722..2fc6f37 100644
--- a/drivers/crypto/caam/intern.h
+++ b/drivers/crypto/caam/intern.h
@@ -70,6 +70,9 @@ struct caam_drv_private {
 
 	struct device *dev;
 	struct platform_device **jrpdev; /* Alloc'ed array per sub-device */
+#ifdef CONFIG_FSL_QMAN
+	struct device *qidev;
+#endif
 	struct platform_device *pdev;
 
 	/* Physical-presence section */