diff options
| author | Minghuan Lian <Minghuan.Lian@freescale.com> | 2013-11-28 10:36:00 (GMT) |
|---|---|---|
| committer | Jose Rivera <German.Rivera@freescale.com> | 2014-03-17 19:38:52 (GMT) |
| commit | 62f0a17ff5dfcba040175e9c1c90a39a08f26447 (patch) | |
| tree | e66a50350f1a29576444e7e20387ad0b4af3886b /include/uapi/linux/fsl_pci_ep_vfio.h | |
| parent | 28dc7598ca17f87ade7cb525be245153284af66d (diff) | |
| download | linux-fsl-qoriq-62f0a17ff5dfcba040175e9c1c90a39a08f26447.tar.xz | |
fsl_pci_ep: add MSIX support
1. The patch initializes MSIX trap outbound window, the application
can map this window and trigger the MSIX interrupt.
2. The patch initializes MSIX inbound window which is used to store
MSIX vector and PBA data.
3. Add sysfs node to display MSIX vector setting
for example:
# cat /sys/class/pci_ep/pci0-pf0/msix
MSIX venctor 0:
control:0x0 data:0x0000406c addr:0x00000000fee00000
MSIX venctor 1:
control:0x0 data:0x0000407c addr:0x00000000fee00000
MSIX venctor 2:
control:0x0 data:0x0000408c addr:0x00000000fee00000
MSIX venctor 3:
control:0x0 data:0x0000409c addr:0x00000000fee00000
MSIX venctor 4:
control:0x0 data:0x000040ac addr:0x00000000fee00000
MSIX venctor 5:
control:0x0 data:0x00000000 addr:0x0000000000000000
MSIX venctor 6:
control:0x0 data:0x00000000 addr:0x0000000000000000
MSIX venctor 7:
control:0x0 data:0x00000000 addr:0x0000000000000000
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Change-Id: I18a6f9056b3c630bba91f5f1dfef2eee01995926
Reviewed-on: http://git.am.freescale.net:8181/9605
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Diffstat (limited to 'include/uapi/linux/fsl_pci_ep_vfio.h')
| -rw-r--r-- | include/uapi/linux/fsl_pci_ep_vfio.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/uapi/linux/fsl_pci_ep_vfio.h b/include/uapi/linux/fsl_pci_ep_vfio.h index 1cf259f..8960157 100644 --- a/include/uapi/linux/fsl_pci_ep_vfio.h +++ b/include/uapi/linux/fsl_pci_ep_vfio.h @@ -36,6 +36,7 @@ enum PCI_EP_REGION_TYPE { PCI_EP_REGION_REGS, PCI_EP_REGION_CONFIG, PCI_EP_REGION_MEM, + PCI_EP_REGION_MSIX_OBWIN }; enum PCI_EP_REGION_INDEX { @@ -72,6 +73,7 @@ struct pci_ep_info { uint32_t ow_num; uint32_t vf_iw_num; uint32_t vf_ow_num; + bool msix_enable; }; #endif |