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authorEmil Medve <Emilian.Medve@Freescale.com>2014-01-06 20:44:53 (GMT)
committerEmilian Medve <Emilian.Medve@freescale.com>2014-01-08 08:07:40 (GMT)
commitfa6ec4fb10aa204781d3cd2c4b788cb0be047e0b (patch)
tree168076345db0e76dd778775c54105054068391e1 /include
parent12fad6833380fdd3ec6e6e4710c357027c6db62c (diff)
downloadlinux-fsl-qoriq-fa6ec4fb10aa204781d3cd2c4b788cb0be047e0b.tar.xz
iommu/fsl: Sync with the upstream PAMU driver
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Change-Id: Icc807d9e8c1a15e19e1dc5f09245384c19560457 Reviewed-on: http://git.am.freescale.net:8181/7709 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Emilian Medve <Emilian.Medve@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/iommu.h21
1 files changed, 0 insertions, 21 deletions
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index e972cd7..d4eb60e 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -42,27 +42,6 @@ struct notifier_block;
typedef int (*iommu_fault_handler_t)(struct iommu_domain *,
struct device *, unsigned long, int, void *);
-/* cache stash targets */
-enum stash_target {
- IOMMU_ATTR_CACHE_L1 = 1,
- IOMMU_ATTR_CACHE_L2,
- IOMMU_ATTR_CACHE_L3,
- IOMMU_ATTR_CACHE_DSP_L2,
-};
-
-/* This attribute corresponds to IOMMUs capable of generating
- * a stash transaction. A stash transaction is typically a
- * hardware initiated prefetch of data from memory to cache.
- * This attribute allows configuring stashig specific parameters
- * in the IOMMU hardware.
- */
-
-struct iommu_stash_attribute {
- u32 cpu; /* cpu number */
- u32 cache; /* cache to stash to L1,L2,L3 */
- u32 window; /* ~0 indicates all windows */
-};
-
struct iommu_omi_attribute {
u32 omi; /* index in the operation mapping table */
u32 window; /* ~0 indicates all windows */