diff options
Diffstat (limited to 'Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt')
-rw-r--r-- | Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt | 43 |
1 files changed, 41 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt index e47734b..b1b569f 100644 --- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt @@ -2,8 +2,9 @@ Required properties: - device_type : should be "network", "hldc", "uart", "transparent" - "bisync", "atm", or "serial". -- compatible : could be "ucc_geth" or "fsl_atm" and so on. + "bisync", "atm", "tdm" or "serial". +- compatible : Describes the specific device attached to the UCC. + Examples include "ucc_geth", "fsl_atm", "ucc_uart" and "fsl,ucc-tdm". - cell-index : the ucc number(1-8), corresponding to UCCx in UM. - reg : Offset and length of the register set for the device - interrupts : <a b> where a is the interrupt number and b is a @@ -53,6 +54,24 @@ Recommended properties: Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only), "tbi", or "rtbi". +Required properties for fsl, ucc-tdm, compatible: +- fsl,rx-sync-clock, fsl,tx-sync-clock: the TDM sync clock source for + receive/transmit + "none": clock source is disabled + "rsync_pin" : clock source is TDM_A1 RSYNC pin + "brg9" through "brg15" : clock source is BRG9-BRG15, respectively +- fsl,tdm-tx-timeslot, fsl,tdm-rx-timeslot: time slot mask for transmit/receive + Each bit (LSB first) corresponds to a time slot. The time slot is enabled + if the bit is set +- fsl,tdm-id : It is the tdm port number. e.g. P1021E has 4 ports - port + A/B/C/D mapping to number 0/1/2/3. +- fsl,tdm-framer-type : It should be "t1" or "e1", "t1" for T1 line rate, and + "e1" for E1 line rate +- fsl,tdm-mode : It is tsa working mode. It should be "normal" or + "internal-loopback" +- fsl,siram-entry-id : This number is used for setting index siram entry + It should be 0/2/4.../14. Each TDM should not use the same number + with others Example: ucc@2000 { device_type = "network"; @@ -68,3 +87,23 @@ Example: phy-connection-type = "gmii"; pio-handle = <140001>; }; + + tdmc: ucc@2400 { + compatible = "fsl,ucc-tdm"; + cell-index = <5>; + reg = <0x2400 0x200>; + interrupts = <40>; + interrupt-parent = <&qeic>; + rx-clock-name = "clk7"; + tx-clock-name = "clk13"; + fsl,rx-sync-clock = "rsync_pin"; + fsl,tx-sync-clock = "tsync_pin"; + fsl,tx-timeslot = <0x00ffffff>; + fsl,rx-timeslot = <0x00ffffff>; + pio-handle = <&pio_tdmc>; + fsl,tdm-framer-type = "t1"; + fsl,tdm-mode = "normal"; + fsl,tdm-id = <2>; + fsl,siram-entry-id = <4>; + phy-handle = <&tdmphy>; + }; |