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2013-04-19iommu: Fix potential memory leak issueBharat Bhushan
The dma_domain->win_arr is allocated when geometry is set. But if domain is destroyed then the allocated memory is not freed. When the dma_domain is created again then dma_domain is allocated again, so previous win_arr pointer is lost and never freed. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Change-Id: Ie6d964215c43aa59b9e38ac544169b58aba4bc1a Reviewed-on: http://git.am.freescale.net:8181/1488 Reviewed-by: Yoder Stuart-B08248 <stuart.yoder@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19Fix geometry configured status checkBharat Bhushan
Checking dma_domain->win_cnt is not sufficient to conclude that geometry it set. Either it should check dma_domain->geom_size also or it should check dma_domain->win_arr as this is allocated when geometry is set. We are using dma_domain->win_arr pointer check in this patch. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Change-Id: I67418215ca6e9f495ec80d90a77a15a9cb766d90 Reviewed-on: http://git.am.freescale.net:8181/1487 Reviewed-by: Yoder Stuart-B08248 <stuart.yoder@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19KVM:PPC: use guest set WIMGE tlb attributesBharat Bhushan
The guest will need to create cache-inhibited mappings for direct device I/O. Note that this means that the guest can create architecturally undefined situations by mapping the same memory both cached and uncached (either by itself with multiple mappings, or relative to a host mapping). This can be solved, but requires tracking either which physical address /regions should be cacheable (similar to what /dev/mem does now), or how each physical page has already been mapped. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Change-Id: I97e3f099e11631b3b9a81b4e5205d80624b6f730 Reviewed-on: http://git.am.freescale.net:8181/1486 Reviewed-by: Yoder Stuart-B08248 <stuart.yoder@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19cpufreq: powerpc: Add cpufreq driver for Freescale e500mc SoCsTang Yuantian
Add cpufreq driver for Freescale e500mc, e5500 and e6500 SoCs which are capable of changing the CPU frequency dynamically Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Change-Id: Ic9e2738b5ed002f9500c317048e37971ae46c2ed Reviewed-on: http://git.am.freescale.net:8181/540 Reviewed-by: Li Yang-R58472 <LeoLi@freescale.com> Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19powerpc/dpaa_eth: add missing ethtool_op_get_linkShengzhou Liu
The get_link is requred by some applications(e.g. ixxat 1588 stack). Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I59376bff897710dba6e34aa624f60b4f1b473f86 Reviewed-on: http://git.am.freescale.net:8181/1601 Reviewed-by: Radulescu Ruxandra Ioana-B05472 <ruxandra.radulescu@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19dpaa_eth: add ethtool PAUSE frame supportCristian Bercaru
Change-Id: I52222f0bf60bb073bb3b77bf935a31e84b4939c0 Reviewed-on: http://git.am.freescale.net:8181/1545 Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Sovaiala Cristian-Constantin-B39531 <Cristian.Sovaiala@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19Add Freescale CodeWarrior support for kernelKumar Gala
Linux kernel on 85xx platform. ppc: IPROT needs bo be cleared to boot up Linux when enabling CW debug when CodeWarrior debug is enabled, PROT needs bo be cleared to boot up Linux. Signed-off-by: Bogdan Adrin <drian.bogdan@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Conflicts: arch/powerpc/Kconfig.debug Change-Id: Ia86a8b5e064eb52c70d5a7247fad7f025c2bc1d3 Reviewed-on: http://git.am.freescale.net:8181/1621 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19Added CodeWarrior support for 64 bitsCatalin Udma
Enable the configuration option to include CodeWarrior support for kernel debugging also for 64 bits (Kernel hacking sub-menu). Signed-off-by: Catalin Udma <b32721@freescale.com> Conflicts: arch/powerpc/Kconfig.debug Change-Id: Ieb381cd967c5a61d572635db0da488c177ef553d Reviewed-on: http://git.am.freescale.net:8181/1620 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19gianfar: remove the redundant backup/recover operationXie Xiaobo
Because introduce TXPAL space into skb_buffer, the timestamp will be placed into TXPAL, So the old backup/recover operation was redundant. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Change-Id: Ie10571bf26fd73ca3cdca346c1783579d80f4faf Reviewed-on: http://git.am.freescale.net:8181/1599 Reviewed-by: Manoil Claudiu-B08782 <claudiu.manoil@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19gianfar: Fix the incorrect handle of PTP circle bufferXie Xiaobo
When didn't find the timestamp for a ptp message, the current driver will empty the whole timestamp buffer. It will discard some timestamps that are still in effect. Apply this patch, It only discard these overdue timestamp. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Change-Id: Ifce09e4148de02a7afad25bbfce3e2fb8faa2a98 Reviewed-on: http://git.am.freescale.net:8181/1530 Reviewed-by: Manoil Claudiu-B08782 <claudiu.manoil@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19eSDHC: Enable IRQ detect mod for p1020 and p5040Haijun.Zhang
Card insert and remove interrupt can be generate and work well. So using IRQ mod for card detecting instead of polling mod. This patch can avoid the call trace bug used to produce. also can improve the performance for card data transfer. Avoid no necessary frequent access to cpu and card. Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com> Change-Id: I06b98f0bdc5208d0bf41a2ca79a78435b5c1bd27 Reviewed-on: http://git.am.freescale.net:8181/1218 Reviewed-by: Xie Xiaobo-R63061 <X.Xie@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19powerpc/fsl: Enable CONFIG_E1000E & CONFIG_ATHEROS_PHY in mpc85xx_smp_defconfigChunhe Lan
On the most boards of Freescale platform, they use the PCI-Express Intel(R) PRO/1000 gigabit ethernet card to work. So enable the corresponding driver for it. The P1023RDB uses the Atheros ar8035 phy to the MAC, so enable the corresponding driver for it. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Change-Id: Ifd49dd1ba13a5c0e5572c8d4544f14bb84165425 Reviewed-on: http://git.am.freescale.net:8181/1572 Reviewed-by: Zang Tiefei-R61911 <tie-fei.zang@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19net/phy: Add Atheros AR8035 PHY supportChunhe Lan
The AR8035 is a single port 10/100/1000 Mbps tri-speed Ethernet PHY. It supports an RGMII interface to the MAC with wide RGMII I/O voltage support from 1.5V to 3.3V. Signed-off-by: Michael Johnston <michael.johnston@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Change-Id: I6676faab8cb43a42bad8517297d6c45f79a05923 Reviewed-on: http://git.am.freescale.net:8181/1571 Reviewed-by: Zang Tiefei-R61911 <tie-fei.zang@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19powerpc/rcpm: change the compatible of the RCPM nodeZhao Chenhui
Change it from "fsl,qoriq-rcpm-2" to "fsl,qoriq-rcpm-2.0". Change-Id: Ia3aab6fef3173c61645f6c4f78dd9f049249b3c3 Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/1442 Reviewed-by: Li Yang-R58472 <LeoLi@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19powerpc/85xx: Add P1023RDB board supportChunhe Lan
P1023RDB Specification: ----------------------- Memory subsystem: 512MB DDR3 (Fixed DDR on board) 64MB NOR flash 128MB NAND flash Ethernet: eTSEC1: Connected to Atheros AR8035 GETH PHY eTSEC2: Connected to Atheros AR8035 GETH PHY PCIe: Three mini-PCIe slots USB: Two USB2.0 Type A ports I2C: AT24C08 8K Board EEPROM (8 bit address) Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Change-Id: I7bd059b3fdf39c14af57ef50e7d4a13a27a7780e Reviewed-on: http://git.am.freescale.net:8181/1452 Reviewed-by: Zang Tiefei-R61911 <tie-fei.zang@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-19b4qds: DPAA support in device trees of B4860 and B4420Poonam Aggrwal
B4860 has 6 1G SGMII and 2 10G interfaces B4420 has 4 1G SGMII and no 10G The QDS board has 2 on board SGMII PHYs and other 1G interfaces can be exercised using SGMII Riser card mounted on a slot on AMC card. 10G interfaces can be used using XAUI riser cards on slots on AMC card. Also included e6500_power_isa.dtsi in b4si-post.dtsi to match up with T4. Signed-off-by: Sandeep Singh <sandeep@freescale.com> Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Change-Id: I58231f43a75ebfa63bb9c9b3f6717848f0f6f6ed Reviewed-on: http://git.am.freescale.net:8181/1358 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18fmd: Remove debug output for AdjustLinkAndy Fleming
This debug output was printing out a ton of messages on a perfectly functional system. Change-Id: I2377701d407b1b2f373997f58bc44c85f80182f1 Signed-off-by: Andy Fleming <afleming@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/1562 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18powerpc/cornet: add qixis FPGA compatibleshaohui xie
Without the qixis FPGA compatible, FPGA node on T4240QDS will not be found. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Change-Id: I26d8e797c9549c0cf97038c224f1700cc21ec8e2 Reviewed-on: http://git.am.freescale.net:8181/1543 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18net/phy: Add support for dp8384x phyXie Xiaobo
Support National Semiconductor PHYs DP83848/83849. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Change-Id: I0c1128512e3d80eb53af0e307ca42b3698668a40 Reviewed-on: http://git.am.freescale.net:8181/1154 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18ASF-QoS: Enabling Tx Schdeuler by default in Kconfig.Sachin Saxena
- IF ASF-QoS is Enabled , Scheduler shall be enabled by default. - S/W shaper for NON-DPAA can be used only with S/W Scheduler. Change-Id: I0e09fe46281d4af1dc022c27665c89b2fb92a640 Signed-off-by: Sachin Saxena <sachin.saxena@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/1485 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18ASF-QOS: Adding API to configure QMAN Scheduler via ASFSachin Saxena
- API shall be defined & Exported only when ASF QOS is in use Change-Id: I026b34d6dec70f70cf44bcaa23573c18ff457b19 Signed-off-by: Sachin Saxena <sachin.saxena@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/1378 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18FMAN: Adding Wrapper API to use Rate Limiting FeatureSachin Saxena
- The API enables other module to Set / Delete Rate Limiting Feature on a given FMAN port. Change-Id: I28f0bdfb9ca2b1c97df6dfcb2456bc3730cfd7d2 Signed-off-by: Sachin Saxena <sachin.saxena@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/1377 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18powerpc/corenet/config: add missing UIO config forJeffrey Ladouceur
corenet64_smp_defconfig Add CONFIG_UIO since devices depend on it. Such as USDPAA QBman. Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com> Change-Id: Id462ded1622453c1ca678558a19f16bc7cc7d196 Reviewed-on: http://git.am.freescale.net:8181/1548 Reviewed-by: Thorpe Geoff-R01361 <Geoff.Thorpe@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18Cleanup USDPAA resources when a process exitsRoy Pledge
Add an API to query the usage levels of DMA memory Elminates UIO and converts USDPAA to interact with the kernel via a character devicc Removed misc/devices fsl_usdpaa file Remove unneeded file Change-Id: I797548e2c79f7098e6378484bcae2b455f022cd4 Reviewed-on: http://git.am.freescale.net:8181/1546 Reviewed-by: Ladouceur Jeffrey-R11498 <Jeffrey.Ladouceur@freescale.com> Reviewed-by: Wang Haiying-R54964 <Haiying.Wang@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xxJia Hongtao
A PCIe erratum of mpc85xx may causes a core hang when a link of PCIe goes down. when the link goes down, Non-posted transactions issued via the ATMU requiring completion result in an instruction stall. At the same time a machine-check exception is generated to the core to allow further processing by the handler. We implements the handler which skips the instruction caused the stall. This patch depends on patch: powerpc/85xx: Add platform_device declaration to fsl_pci.h Signed-off-by: Zhao Chenhui <b35336@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Liu Shuo <soniccat.liu@gmail.com> Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Change-Id: Ie2d8e5db75b242a9687170bc9f7aac53698192c7 Reviewed-on: http://git.am.freescale.net:8181/1525 Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18powerpc: Move opcode definitions from kvm/emulate.c to asm/ppc-opcode.hJia Hongtao
Opcode and xopcode are useful definitions not just for KVM. Move these definitions to asm/ppc-opcode.h for public use. Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Change-Id: I7d1a228a8e2690c42d232cbf4ac3b53b1e9766df Reviewed-on: http://git.am.freescale.net:8181/1524 Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18dpaa_eth: Add initial support for trace eventsIoana Radulescu
Create a basic framework and an example for using trace events in the DPAA ethernet driver. New trace events can be added in the dpaa_eth_trace.h file and called from relevant places in the driver code. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Change-Id: I7235ddc0f9fb69bbb8eaf506510e72bf2f63fb7d Reviewed-on: http://git.am.freescale.net:8181/1540 Reviewed-by: Hamciuc Bogdan-BHAMCIU1 <bogdan.hamciuc@freescale.com> Reviewed-by: Sovaiala Cristian-Constantin-B39531 <Cristian.Sovaiala@freescale.com> Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18netpoll: Add support for hardware checksumming on egressBogdan Hamciuc
Netpoll used to compute its own csum; but if the device supports, we should let it do the checksum itself. Note: we owe the upstream community some documentation about why and how we configure FMan for checksumming on egress. It is apparently not clear to them and so a reason for not having this patch upstream yet. Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com> Change-Id: Ie2c8210e1d1e7f5be60bcb9610042009548e06bd Reviewed-on: http://git.am.freescale.net:8181/1539 Reviewed-by: Sovaiala Cristian-Constantin-B39531 <Cristian.Sovaiala@freescale.com> Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18dpaa_eth: Add NETPOLL supportBogdan Hamciuc
Add NETPOLL support to the dpaa-ethernet driver. This is particularly useful in tandem with the Netconsole module, when we'd want to drop tons of logs (e.g. Ftrace logs) and the serial console is just too slow for that. Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com> Change-Id: Ic20b62603c58910d86d17afdd9a85e4b049526f1 Reviewed-on: http://git.am.freescale.net:8181/1538 Reviewed-by: Sovaiala Cristian-Constantin-B39531 <Cristian.Sovaiala@freescale.com> Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18dpaa_eth: allow MAC change while interface runningMarian Rotariu
Added private flag to net device to let user change the physical address even if the interface is up Signed-off-by: Marian Rotariu <marian.rotariu@freescale.com> Change-Id: I2b07a9e8ac86dae097e69882c4ea372a07899137 Reviewed-on: http://git.am.freescale.net:8181/1537 Reviewed-by: Hamciuc Bogdan-BHAMCIU1 <bogdan.hamciuc@freescale.com> Reviewed-by: Sovaiala Cristian-Constantin-B39531 <Cristian.Sovaiala@freescale.com> Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18dpaa_eth: make use of skb_frag_dma_map()Madalin Bucur
Use convenience function to map fragment page. Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: If99e0692bddcd50661fb78be089d8f89c720cbca Reviewed-on: http://git.am.freescale.net:8181/1536 Reviewed-by: Hamciuc Bogdan-BHAMCIU1 <bogdan.hamciuc@freescale.com> Reviewed-by: Sovaiala Cristian-Constantin-B39531 <Cristian.Sovaiala@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18dpaa-eth: Alloc NR_CPUS TX frame queuesCristian Sovaiala
No matter the number of TX frame queues specified in the device tree we allocate one frame queue for each CPU. For a number of frame queues smaller than the number of CPUs, certain queues will be allocated to more than one CPU. For a larger number of frame queues than available CPUs, a number of NR_CPUS frame queues will be used only. Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com> Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: Ie00aae47d03ffed7d3e0b5e449557ab4c01e3288 Reviewed-on: http://git.am.freescale.net:8181/1535 Reviewed-by: Hamciuc Bogdan-BHAMCIU1 <bogdan.hamciuc@freescale.com> Reviewed-by: Sovaiala Cristian-Constantin-B39531 <Cristian.Sovaiala@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18gianfar: add support for wake-on-packetchenhui zhao
On certain chip like MPC8536 and P1022, system can be waked up from sleep by user-defined packet and Magic Patcket.(The eTSEC cannot supports both types of wake-up event simultaneously.) This patch implements wake-up on user-defined patcket including ARP request packet and unicast patcket to this station. When entering suspend state, the gianfar driver sets receive queue filer table to filter all of packets except ARP request packet and unicast patcket to this station. The driver temporarily uses the last receive queue to receive the user defined packet. In suspend state, the receive part of eTSEC keeps working. When receiving a user defined packet, it generates an interrupt to wake up the system. The rule of the filer table is as below. if (arp request to local ip address) accept it to the last queue elif (unicast packet to local mac address) accept it to the last queue else reject it endif Note: The local ip/mac address is the ethernet primary IP/MAC address of the station. Do not support multiple IP/MAC addresses. Here is an example of enabling and testing wake up on user defined packet. ifconfig eth0 10.193.20.169 ethtool -s eth0 wol a echo standby > /sys/power/state or echo mem > /sys/power/state Ping from PC host to wake up the station: ping 10.193.20.169 Change-Id: Ib3a29047bb55c770fe8cacae3299a5e5f3420c89 Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Jin Qing <b24347@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/1517 Reviewed-by: Manoil Claudiu-B08782 <claudiu.manoil@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18powerpc/fsl-pci: fix pcie range issue for some P1/P2 boardsHaijun.Zhang
Impact board list: P1020MBG-PC. P1022DS P1020RDB-PD,P2020RDB All above boards have its PCIE memory range less than 0xbfff_ffff, but in dts its boundary value was 0xe0000000. Both of them was maped to the same boundary 0xe0000000 which was Overlapped and crossed. Cpu will access the illicit memery addr and detect error then lead to cpu stall. So update dts for these boards. error log: PCI host bridge /pcie@ffe09000 (primary) ranges: MEM 0x00000000a0000000..0x00000000bfffffff -> 0x00000000e0000000 IO 0x00000000ffc10000..0x00000000ffc1ffff -> 0x0000000000000000 /pcie@ffe09000: PCICSRBAR @ 0xdff00000 Found FSL PCI host bridge at 0x00000000ffe0a000. Firmware bus number: 0->0 PCI host bridge /pcie@ffe0a000 ranges: MEM 0x0000000080000000..0x000000009fffffff -> 0x00000000e0000000 IO 0x00000000ffc00000..0x00000000ffc0ffff -> 0x0000000000000000 /pcie@ffe0a000: PCICSRBAR @ 0xdff00000 ......... ata2: SATA link down (SStatus 0 SControl 300) INFO: rcu_sched self-detected stall on CPU { 1} INFO: rcu_sched detected stalls on CPUs/tasks: { 1} (detected by 0, t=5252 jiffies, g=4294967053, c=4294967052, q=76) Task dump for CPU 1: swapper/0 R running 0 1 0 0x00000804 Call Trace: [ee049c30] [c00091c8] timer_interrupt+0x180/0x1a0 (unreliable) [ee049c60] [c000e7ec] ret_from_except+0x0/0x18 --- Exception: 901 at pci_enable_msix+0x378/0x440 LR = pci_enable_msix+0x36c/0x440 [ee049d70] [c03ba220] e1000e_set_interrupt_capability+0xb8/0x120 [ee049d80] [c03bdfcc] e1000_probe+0x360/0xc18 [ee049dd0] [c02866e4] pci_device_probe+0x84/0xac The right range window: Found FSL PCI host bridge at 0x00000000ffe09000. Firmware bus number: 0->1 PCI host bridge /pcie@ffe09000 (primary) ranges: MEM 0x00000000a0000000..0x00000000bfffffff -> 0x00000000a0000000 IO 0x00000000ffc10000..0x00000000ffc1ffff -> 0x0000000000000000 /pcie@ffe09000: PCICSRBAR @ 0xfff00000 Found FSL PCI host bridge at 0x00000000ffe0a000. Firmware bus number: 0->0 PCI host bridge /pcie@ffe0a000 ranges: MEM 0x0000000080000000..0x000000009fffffff -> 0x0000000080000000 IO 0x00000000ffc00000..0x00000000ffc0ffff -> 0x0000000000000000 /pcie@ffe0a000: PCICSRBAR @ 0xfff00000 Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> Change-Id: Ic9acf67d6012f79b134ce9b07f5aeed6e6bf06ed Reviewed-on: http://git.am.freescale.net:8181/1497 Reviewed-by: Zang Tiefei-R61911 <tie-fei.zang@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18b4860: update corenet-cf node compatibleLaurentiu Tudor
The register layout of the CCF block present in b4860 matches the one on t4240. Thus, the corenet-cf node device tree node should have the same compatible as t4240. Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Change-Id: I4a33551c93c97af97a30a972ec12899b7e48042c Reviewed-on: http://git.am.freescale.net:8181/1470 Reviewed-by: Leekha Shaveta-B20052 <shaveta@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18phy/10g: fix a logic errorShaohui Xie
The operator '!' is higher than '&', so there should be a parentheses. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Change-Id: Ib734ca0bd4b4ca7376bafdf4709114cdbde485c2 Reviewed-on: http://git.am.freescale.net:8181/1495 Reviewed-by: Zang Tiefei-R61911 <tie-fei.zang@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18powerpc/corenet/dts: add compatible for 10G PHYShaohui Xie
Compatible "ethernet-phy-ieee802.3-c45" is used to indicate that a 10G PHY should be accessed by clause 45, without the compatible, the 10G PHY will not be accessed correctly. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Change-Id: I672331998d08e3730c9fde3163ff84cd6c0e2b2a Reviewed-on: http://git.am.freescale.net:8181/1494 Reviewed-by: Zang Tiefei-R61911 <tie-fei.zang@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18Changing poll operation from TDM port to TDM channelSandeep Singh
Since all read/write operations are in TDM are channel based, polling on TDM channel for data instead of TDM port before going for read/write. Also corrected a faulty error leg. Signed-off-by: Sandeep Singh <Sandeep@freescale.com> (cherry picked from commit 304c5cc5f167d1ac8990e36579cc2f87851f0cdd) Change-Id: I5c0ec540c0db8e538e2b650ac0a0d5bdffaca336 Reviewed-on: http://git.am.freescale.net:8181/1159 Reviewed-by: Xu Jiucheng-B37781 <Jiucheng.Xu@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18Added device tree entries for Legerity SLIC node on various Freescale PlatformsSandeep Singh
SLIC device is connected on SPI bus on these platforms Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> (cherry picked from commit 48cc0cd5a4d55b7a0972bd5f6e643b080275bffd) Change-Id: Icfcab84414c0781dd183ccb7756d0176ae20a276 Reviewed-on: http://git.am.freescale.net:8181/1158 Reviewed-by: Xu Jiucheng-B37781 <Jiucheng.Xu@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18powerpc/64bit,PREEMPT_RT: Check preempt_count before preemptingPriyanka Jain
In ret_from_except_lite() with CONFIG_PREEMPT enabled, add the missing check to compare value of preempt_count with zero before continuing with preemption process of the current task. If preempt_count is non-zero, restore reg and return, else continue the preemption process. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Fixes CQ:ENGR257848 CONFIG_PREEMPT_RT_FULL does not work on 64-bit Change-Id: I3eace28e76246257e6f8510da50c2811e7a572db Reviewed-on: http://git.am.freescale.net:8181/1267 Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18clk: add PowerPC corenet clock driver supportTang Yuantian
This adds the clock driver for Freescale PowerPC corenet series SoCs using common clock infrastructure. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Change-Id: I0f32eb41af65374e0ddf936958fdadc22c18f764 Reviewed-on: http://git.am.freescale.net:8181/538 Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18powerpc/85xx: workaround for chips with MSI hardware errataJia Hongtao
The MPIC version 2.0 has a MSI errata (errata PIC1 of mpc8544), It causes that neither MSI nor MSI-X can work fine. This is a workaround to allow MSI-X to function properly. Signed-off-by: Liu Shuo <soniccat.liu@gmail.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Change-Id: Iaeaddc226c395beef4007b705869e2694760dc0f Reviewed-on: http://git.am.freescale.net:8181/1330 Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18powerpc/MPIC: Add get_version API both for internal and external useJia Hongtao
MPIC version is useful information for both mpic_alloc() and mpic_init(). The patch provide an API to get MPIC version for reusing the code. Also, some other IP block may need MPIC version for their own use. The API for external use is also provided. Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Change-Id: I5caf1f9d031573049f97a6de7a09f9fc6c64ccd8 Reviewed-on: http://git.am.freescale.net:8181/1329 Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18dpaa_eth: Add support for hardware timestampingMadalin Bucur
Add Linux conforming support for hardware timestamping. Minor fixes and comments about the FSL_DPA_1588 code. Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: I6f9cd77cbe157219cb77e87bb8cfd72bee037261 Reviewed-on: http://git.am.freescale.net:8181/1469 Reviewed-by: Radulescu Ruxandra Ioana-B05472 <ruxandra.radulescu@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18dpaa_eth: Add support for new buffer layout parametersIoana Radulescu
The new chosen node mechanism allows a user to configure some extra per port parameters related to buffer layout. Add support in the ethernet driver to account for these new parameters and the changes in FMD wrapper API. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Change-Id: I54ef34be7b2ce1b644245816cbf234c8c6d8dcab Reviewed-on: http://git.am.freescale.net:8181/1468 Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Sovaiala Cristian-Constantin-B39531 <Cristian.Sovaiala@freescale.com> Reviewed-by: Bercaru Cristian-B43982 <cristian.bercaru@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18dpaa_eth: Allow separate buffer layouts per rx/tx portIoana Radulescu
Until now all ports expected the same (hardcoded) buffer layout, where buffer layout means: private data size, presence of parse results, hash results, timestamp. Buffer layout also influences the size of the buffers for private ports. Create a framework for configuring the buffer layout on a per rx/tx port basis. There is no change in functionality at the moment (the same values for buffer layout are kept). Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Change-Id: I3792b095330575d199f4cbe071de718ae6d45ab1 Reviewed-on: http://git.am.freescale.net:8181/1467 Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18dpaa_eth: Delay buffer pool seeding for private portsIoana Radulescu
Until now, all private ports had to be configured to use the same buffer size, as they all share a common buffer pool. Create the framework for working with different buffer sizes on the private ports; a single, common buffer pool is still used by all private ports. The pool is seeded with buffers large enough to accomodate frames for all private ports. In order to be able to compute the largest needed buffer size, the buffer pool seeding is delayed until the first private interface is raised. Temporarily disable the boot-time ethernet unit test, which requires the use of the common buffer pool. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Change-Id: I22d40d136e35320b7b4af76e18e53faff7460cbf Reviewed-on: http://git.am.freescale.net:8181/1466 Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-1885xx: enable Silicon image 3132 PCIe to SATA controllerRoy ZANG
Some 85xx board, for example, P1020RDB-PC has on board silicon image PCIe to SATA controller and when booting up, the filesystem will auto mount to the SATA disk. So enable silicon image 3132 pcie to sata controller by default Posted upstream at http://patchwork.ozlabs.org/patch/235513/ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> (cherry picked from commit 6bffc39bd2afd7a5d3a5748182b74ecf0f8da3eb) Change-Id: Ic314cdb4ac450478e269141280fb6d40596afdde Reviewed-on: http://git.am.freescale.net:8181/1214 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18uio: Add FSL RMan UIO driver supportMinghuan Lian
Add support to expose FSL RMan controller to user space via UIO system. The RMan is composed of a global configuration and multiple inbound classification units. We map the global configuration as one UIO device and each classification unit as a unique UIO device. Change-Id: Ia491dae0d82c5fee9eb7e2b535305b557ba7329a Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/922 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-04-18DTS: Add compaible list for eSDHCHaijun Zhang
Add compatible of esdhc for below board: p2041 p3041 p4080 p5020 p5040 Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> CC: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> CC: Xie Xiaobo-R63061 <X.Xie@freescale.com> Change-Id: Ic206cea21620d702bb4194dc2cf909b28e07a30e Reviewed-on: http://git.am.freescale.net:8181/1220 Reviewed-by: Xie Xiaobo-R63061 <X.Xie@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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