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into fixes
From Jason Cooper <jason@lakedaemon.net>:
Small fixes for the orion platforms including kirkwood.
* 'fixes-for-v3.6' of git://git.infradead.org/users/jcooper/linux:
ARM: Kirkwood: fix Makefile.boot
ARM: Kirkwood: Fix iconnect leds
ARM: Orion: Set eth packet size csum offload limit
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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While building the dtbs target, one is getting:
make dtbs
make[1]: *** No rule to make target `arch/arm/boot/kirkwood-qnap-ts219.dtb', needed by `arch/arm/boot/dtbs'. Stop.
make: *** [dtbs] Error 2
The reason is that there's no kirkwood-qnap-ts219.dts file. Update Makefile.boot
to reflect the dts files present.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The mv643xx ethernet controller limits the packet size for the TX
checksum offloading. This patch sets this limits for Kirkwood and
Dove which have smaller limits that the default.
As a side note, this patch is an updated version of a patch sent some years
ago: http://lists.infradead.org/pipermail/linux-arm-kernel/2010-June/017320.html
which seems to have been lost.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Cc: <stable@vger.kernel.org>
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Just a small typo fix to make lsxl dtbs compile
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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It has been decided to use marvell, not mrvl, in the compatibility
property. Search & replace.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Josh Coombs <josh.coombs@gmail.com>
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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Now that we have I2C support in DT, describe the LM63 in
the DT file for the iConnect.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
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Now that the GPIO controllers have been converted over to DT,
described the gpio-keys in DT.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
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Move description of GPIO keys on both the DNS320 and DNS325 into DT.
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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Replace code in board-dnskw with the equivalent devicetree bindings.
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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Now that we have I2C support in DT, describe the LM75 in
the DT file for the DNS325.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
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Convert boards using DT, but the old way of configuring SATA to now
use properties in there DT file.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
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Use the device tree for the SPI driver and partition layout.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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Add support for Buffalo Linkstation LS-XHL and LS-CHLv2 using the device
tree where possible.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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This patch supplies the necessary DTS and supporting files to boot up
a Seagate GoFlex Net with 3.5.0-rc3.
Signed-off-by: Joshua Coombs <josh.coombs@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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The two different variants of QNAP TS devices, varying by SoC, put the
GPIO keys on different GPIO lines. Hence we need two different DT
board descriptions, which share the same board-ts219.c file.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
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Add support for instantiating this driver from device tree, and add
the necassary DT information to the kirkwood.dtsi file.
This is based on previous work by Michael Walle and Jason Cooper.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Josh Coombs <josh.coombs@gmail.com>
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Add device tree support to the Orion watchdog timer, and enable its
use in the kirkwood devices using device tree.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
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The MV64XXX I2C driver needs a clock in order to calculate the baud
rate factors. So add an clk to the clk tree. Also add the base DT
properties for kirkwood devices.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Conflicts:
arch/arm/mach-kirkwood/common.c
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Populate the devices with auxdata to set the device names which are used by
clkdev to lookup the clocks.
Signed-off-by: Michael Walle <micheal@walle.cc>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
v2: Add interrupts properties, although not used.
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Both IRQ and GPIO controllers can now be represented in DT. The IRQ
controllers are setup first, and then the GPIO controllers. Interrupts
for GPIO lines are placed directly after the main interrupts in the
interrupt space.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Josh Coombs <josh.coombs@gmail.com>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
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Commit 98d9986 (ARM: Kirkwood: Replace clock gating) and the fix 5fb2ce
(ARM: Kirkwood: clk_register_gate_fn: add fn assignment) introduced a custom
variant of clock gating which allows to define a function to be called
before gating the clock off.
This is used to disable the SATA and PCIe PHYs if the respective clocks
are unused after initialization.
However, of these two drivers, the SATA driver may be compiled as a module.
The driver re-enables the clocks at module init but the PHYs stay disabled.
Since the custom clock gating disabled the PHYs when gating the clock off,
it should also re-enable them when enabling the clock gate. This is done by
adding a second function that may be used to enable the PHYs.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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Marvell engineers tell us:
It seems that many units use the RUNIT clock.
SPI, UART, NAND, TWSI, ...
So it's not possible to clock gate it.
Currently the SPI, NAND and TWSI driver will clk_prepaure_enable()
this clk, but since we have no idea what ... is, and turning this clk
off results in a hard lock, unconditionally enable runit.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
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The orion watchdog is expecting to be passed the physcial address of
the hardware, and will ioremap() it to give a virtual address it will
use as the base address for the hardware. However, when creating the
platform resource record, a virtual address was being used.
Add the necassary #define's so we can pass the physical address as
expected.
Tested on Kirkwood and Orion5x.
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Olof Johansson <olof@lixom.net>
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In commit:
98d9986 ARM: Kirkwood: Replace clock gating
the kirkwood clock gating has been reworked. A custom variant of
clock gating, that calls a custom function before gating the clock
off, has been introduced. However in clk_register_gate_fn() this
custom function "fn" is never assigned.
This patch adds the missing fn assignment.
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@blackshift.org>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Olof Johansson <olof@lixom.net>
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v3.5-rc1 fails to build when DT and iconnect is enabled because of
this now none existant include file.
Also remove the other two SPI include files, which are not needed
with the move to DT.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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When the ethernet driver was built as a module, it would lock the
machine when loaded. At boot the ethernet clks are unused, so get
turned off. Later, when the module is loaded, the probe function
would access the hardware before the clock was restarted, and the
machine would lock. It has also been determined that when the clk is
turned off, the interface forgets its MAC address, which for most
systems, is set by the boot loader.
When the machine setup file creates a platform device for the
interface, prepare and enable the clock for the interface. This will
ensure it is not turned off. However, if the setup file only
instantiates one platform device, the other will have its clk
disabled, thus maybe saving a little power.
Report-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Pull arm-soc clock driver changes from Olof Johansson:
"The new clock subsystem was merged in linux-3.4 without any users,
this now moves the first three platforms over to it: imx, mxs and
spear.
The series also contains the changes for the clock subsystem itself,
since Mike preferred to have it together with the platforms that
require these changes, in order to avoid interdependencies and
conflicts."
Fix up trivial conflicts in arch/arm/mach-kirkwood/common.c (code
removed in one branch, added OF support in another) and
drivers/dma/imx-sdma.c (independent changes next to each other).
* tag 'clock' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits)
clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate().
clk: Provide dummy clk_unregister()
SPEAr: Update defconfigs
SPEAr: Add SMI NOR partition info in dts files
SPEAr: Switch to common clock framework
SPEAr: Call clk_prepare() before calling clk_enable
SPEAr: clk: Add General Purpose Timer Synthesizer clock
SPEAr: clk: Add Fractional Synthesizer clock
SPEAr: clk: Add Auxiliary Synthesizer clock
SPEAr: clk: Add VCO-PLL Synthesizer clock
SPEAr: Add DT bindings for SPEAr's timer
ARM i.MX: remove now unused clock files
ARM: i.MX6: implement clocks using common clock framework
ARM i.MX35: implement clocks using common clock framework
ARM i.MX5: implement clocks using common clock framework
ARM: Kirkwood: Replace clock gating
ARM: Orion: Audio: Add clk/clkdev support
ARM: Orion: PCIE: Add support for clk
ARM: Orion: XOR: Add support for clk
ARM: Orion: CESA: Add support for clk
...
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Pull arm-soc board specific changes from Olof Johansson:
"While we generally attempt to get rid of board specific files and
replace them with device tree based descriptions, a lot of platforms
have not come that far:
In shmobile, we add two new board files because their recently started
effort to add DT support has not proceeded enough to use it for all of
the important hardware.
In Kirkwood, we are adding support for new boards with a combination
of DT and board file contents in multiple cases.
pxa/mmp and imx are extending support for existing board files but not
adding new ones."
Fix up trivial conflicts in arch/arm/mach-{mmp/ttc_dkb.c,shmobile/{Kconfig,Makefile}}
* tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (94 commits)
ARM: shmobile: fix smp build
ARM: kirkwood: Add support for RaidSonic IB-NAS6210/6220 using devicetree
kirkwood: Add iconnect support
orion/kirkwood: create a generic function for gpio led blinking
kirkwood/orion: fix orion_gpio_set_blink
ARM: kirkwood: Define DNS-320/DNS-325 NAND in fdt
kirkwood: Allow nand to be configured via. devicetree
mtd: Add orion_nand devicetree bindings
ARM: kirkwood: Basic support for DNS-320 and DNS-325
ARM: mach-shmobile: Use DT_MACHINE for armadillo 800 eva
ARM: mach-shmobile: Use DT_MACHINE for KZM9G
ARM: pxa: hx4700: Add Synaptics NavPoint touchpad
ARM: pxa: Use REGULATOR_SUPPLY macro
ARM: mach-shmobile: kzm9g: enable SMP boot
ARM: mach-shmobile: kzm9g: defconfig update
ARM: mach-shmobile: kzm9g: add PCF8757 gpio-key
ARM: mach-shmobile: kzm9g: add SDHI support
ARM: mach-shmobile: kzm9g: add MMCIF support
ARM: mach-shmobile: kzm9g: correct screen direction
ARM: mach-shmobile: sh73a0.h: add GPIO_NR
...
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Pull core ARM updates from Russell King:
"This is the bulk of the core ARM updates for this merge window.
Included in here is a different way to handle the VIVT cache flushing
on context switch, which should allow scheduler folk to remove a
special case in their core code.
We have architectured timer support here, which is a set of timers
specified by the ARM architecture for future SoCs. So we should see
less variability in timer design going forward.
The last big thing here is my cleanup to the way we handle PCI across
ARM, fixing some oddities in some platforms which hadn't realised
there was a way to deal with their private data already built in to
our PCI backend.
I've also removed support for the ARMv3 architecture; it hasn't worked
properly for years so it seems pointless to keep it around."
* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (47 commits)
ARM: PCI: remove per-pci_hw list of buses
ARM: PCI: dove/kirkwood/mv78xx0: use sys->private_data
ARM: PCI: provide a default bus scan implementation
ARM: PCI: get rid of pci_std_swizzle()
ARM: PCI: versatile: fix PCI interrupt setup
ARM: PCI: integrator: use common PCI swizzle
ARM: 7416/1: LPAE: Remove unused L_PTE_(BUFFERABLE|CACHEABLE) macros
ARM: 7415/1: vfp: convert printk's to pr_*'s
ARM: decompressor: avoid speculative prefetch from non-RAM areas
ARM: Remove ARMv3 support from decompressor
ARM: 7413/1: move read_{boot,persistent}_clock to the architecture level
ARM: Remove support for ARMv3 ARM610 and ARM710 CPUs
ARM: 7363/1: DEBUG_LL: limit early mapping to the minimum
ARM: 7391/1: versatile: add some auxdata for device trees
ARM: 7389/2: plat-versatile: modernize FPGA IRQ controller
AMBA: get rid of last two uses of NO_IRQ
ARM: 7408/1: cacheflush: return error to userspace when flushing syscall fails
ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held
ARM: 7404/1: cmpxchg64: use atomic64 and local64 routines for cmpxchg64
ARM: 7347/1: SCU: use cpu_logical_map for per-CPU low power mode
...
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Use sys->private_data to store the PCIe port data structure.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add support for the IB-NAS6210 and IB-NAS 6220. Describe as much as
currently possible in the devicetree files, including the NAND partitions.
Use the partition scheme of the original firmware by default.
Create a board-ib62x0.c for everything else.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Add support for Iomega Iconnect system.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-By: Adam Baker <linux@baker-net.org.uk>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Add default configuration for NAND, to be enabled in your board config. Ensure
clock gating is set appropriately when the NAND is enabled.
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Add support for the DNS-320 and DNS-325. Describe as much as currently possible
in the devicetree files, create a board-dnskw.c for everything else.
Changes since last submission (V3) [Addressing comments by]:-
* One MACH_DLINK_KIRKWOOD_DT for all dtb files [Grant Likely, Jason Cooper]
* Drop brain-dead select "select CONFIG_MTD_OF_PARTS" [Grant Likely]
* Don't add NAND support then throw it away immediately after [Grant Likely]
* Describe purpose of MPP 41, 42 & 49
Changes since last submission (V2):-
* Use IEEE-compliant "okay", rather than "ok" [Scott Wood]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Most PCI implementations use the standard PCI swizzle function, which
handles the well defined behaviour of PCI-to-PCI bridges which can be
found on cards (eg, four port ethernet cards.)
Rather than having almost every platform specify the standard swizzle
function, make this the default when no swizzle function is supplied.
Therefore, a swizzle function only needs to be provided when there is
something exceptional which needs to be handled.
This gets rid of the swizzle initializer from 47 files, and leaves us
with just two platforms specifying a swizzle function: ARM Integrator
and Chalice CATS.
Acked-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add a varient of the basic clk-gate code. This variant calls a
function before gating the clock off. This function is used to disable
the SATA or PCIe PHY.
Now that all the drivers prepare and enable there clk as needed, there
is no need for the common code to keep track of which clocks need
gating on. Let the common clock framework turn off clocks which are
not used.
Buy using the added clk varient, when the clk framework turns off SATA
or PCIe clocks, we also disabled SATA and PCIe PHYs which were not
needed.
The function kirkwood_pcie_id() can now be called outside of __init
code, so remove this property for it, and functions it calls.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Prepare and enable the clocks when the board indicates the pcie buses
will be used.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Some orion platforms can gate the XOR driver clock. If the clock
exisits, unable/disable it as appropriate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Some orion platforms support gating of the clock. If the clock exists
enable/disbale it as appropriate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Some orion devices can gate the SDIO clock. If the clock exists,
enable/disable it as appropriate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Not all orion platforms can gate the clock, but if it does exist,
enable/disable it as appropriate.
v2: Fix the name of the clkdev entry.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Not all platforms support gating the clock, so it is not an error if
the clock does not exist. However, if it does exist, we should
enable/disable it as appropriate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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The Orion kirkwood chips have a gatable clock per SATA channel. Add
code to get and enable this clk if it exists.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Let the machine pass to the platform which clock is used by the uart.
Enable the clock and use clk_get_rate() to determine its rate.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Remove tclk from platform data. This makes the platform data
structure empty, so remove it.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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