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Now that cached_to_uncached works as advertized in 32-bit mode and we're
never going to be able to map < 16MB anyways, there's no need for the
special uncached section. Kill it off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This provides a variable for tracking the uncached mapping size, and uses
it for pretty printing the uncached lowmem range. Beyond this, we'll also
be building on top of this for figuring out from where the remainder of
P2 becomes usable when constructing unrelated mappings.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This effectively neutralizes P2 by getting rid of P1 identity mapping
for all available memory and instead only establishes a single unbuffered
PMB entry (16MB -- the smallest available) that covers the kernel.
As using segmentation for abusing caching attributes in drivers is no
longer supported (and there are no drivers that can be enabled in 32-bit
mode that do this), this provides us with all of the uncached access
needs by the kernel itself.
Drivers and their ilk need to specify their caching attributes when
remapping through page tables, as usual.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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All of the cached/uncached mapping setup is duplicated for each size, and
also misses out on the 16MB case. Rather than duplicating the same iter
code for that we just consolidate it in to a helper macro that builds an
iter for each size. The 16MB case is then trivially bolted on at the end.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This cribs the pretty printing from arch/x86/mm/init_32.c to dump the
virtual memory layout on boot. This is primarily intended as a debugging
aid, given that the newer CPUs have full control over their address space
and as such have little to nothing in common with the legacy layout.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This implements dynamic probing for the system FPGA. The system reset
controller contains a fixed magic read word in order to identify the
FPGA. This just utilizes a simple loop that scans across all of the fixed
physical areas (area 0 through area 6) to locate the FPGA.
The FPGA also contains register information detailing the area mappings
and chip select settings for all of the other blocks, so this needs to be
done before we can set up anything else.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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iounmap_fixed() had a couple of bugs in it that caused it to effectively
fail at life. The total number of pages to unmap factored in the mapping
offset and aligned up to the next page boundary, which doesn't match the
ioremap_fixed() behaviour.
When ioremap_fixed() pegs a slot, the address in the mapping data already
contains the offset displacement, and the size is recorded verbatim given
that we're only interested in total number of pages required. As such, we
need to calculate the total number from the original size in the unmap
path as well.
At the same time, there was also an off-by-1 problem in the fixmap index
calculation which has also been corrected.
Previously subsequent remaps of an identical fixmap index would trigger
the pte_ERROR() in set_pte_phys():
arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
With this patch in place, the iounmap-driven fixmap teardown actually
does what it's supposed to do.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This wires up the machine_ops reboot call to use the system reset
controller.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This provides a machine_ops-based reboot interface loosely cloned from
x86, and converts the native sh32 and sh64 cases over to it.
Necessary both for tying in SMP support and also enabling platforms like
SDK7786 to add support for their microcontroller-based power managers.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Presently __in_29bit_mode() is only defined for the PMB case, but
it's also easily derived from the CONFIG_29BIT and CONFIG_32BIT &&
CONFIG_PMB=n cases.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This moves out the FPGA IRQ controller setup code to its own file, in
preparation for switching off of IRL mode and having it provide its own
irq_chip.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This does a bit of refactoring of the FPGA management code. The primary
FPGA initialization is moved out to its own file in preparation for
implementing some of the more complex capabilities, a complete set of
register definitions is provided, and all of the existing users in the
board code are moved over to use the new interface instead of setting up
overlapping mappings. This also corrects the FPGA size, which previously
was chomped off at the SDIF control register.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Usually we can look to the CVR to work out whether we have an FPU or not.
Unfortunately not all parts comply with this, so just set the flag
manually for all SH-4 parts and clear it on the only SH-4 that doesn't
have one (SH4-501).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The ioremap_fixed() stub neglected to provide a return value, resulting
in a fairly noisy build.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Implement .set_rate() for all SH "div4 clocks," .enable(), .disable(), and
.set_parent() for those, that support them. This allows, among other uses,
reparenting of SIU clocks to the external source, and enabling and
disabling of the IrDA clock on sh7722.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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These two got broken in the heartbeat private data conversion,
fix them up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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urquell happens to use the same mode pins and EXTAL configuration as
SDK7786, so just copy it over.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This uses the mode pins exposed through the FPGA to work out whether
we're driven from EXTAL or not and does the appropriate setup and
propagation through the clock framework.
This will also -EINVAL out for anyone adding in their own oscillators,
forcing proper configuration with the clock framework instead of
proceeding on with bogus clock values.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This rewrites the SH7786 clock framework support completely. It's
reworked to provide all of the DIV4 and MSTP function clocks. This brings
it in line with the current clock framework code and lets us drop SH7786
from the list of CPUs that require legacy CPG handling.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The breakpoint handler was renamed on sh32, but sh64 was overlooked in
the conversion. Fix it up now.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This kills off the sh64-specific state restorer and switches over to
the generic one.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Presently the build bails with the following:
CC arch/sh/mm/alignment.o
cc1: warnings being treated as errors
arch/sh/mm/alignment.c: In function 'unaligned_fixups_notify':
arch/sh/mm/alignment.c:69: warning: cast to pointer from integer of different size
arch/sh/mm/alignment.c:74: warning: cast to pointer from integer of different size
make[2]: *** [arch/sh/mm/alignment.o] Error 1
This is due to the fact that regs->pc is always 64-bit, while the pointer size
depends on the ABI. Wrapping through instruction_pointer() takes care of the
appropriate casting for both configurations.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This updates the sh64 processor info with the sh32 changes in order to
tie in to the generic task_xstate management code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The plans for _PAGE_WIRED were detailed in a comment with the fixmap
code, but as it's now all taken care of, we no longer have any reason for
keeping it around, particularly since it's no longer accurate. Kill it
off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Presently this is duplicated between tlb-sh4 and tlb-pteaex. Split the
helpers out in to a generic tlb-urb that can be used by any parts
equipped with MMUCR.URB.
At the same time, move the SH-5 code out-of-line, as we require single
global state for DTLB entry wiring.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This provides a dummy value for legacy parts which permits the entry
wiring to be open-coded. The compiler takes care of optimizing the entry
wiring away in these cases.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Presently ioremap_prot() uses an unsigned long to pass the pgprot value
around. This results in the upper half of the pgprot being chomped when
using 64-bit pgprots on a 32-bit ABI (X2TLB and SH-5).
As the only users of ioremap_prot() are presently legacy parts, this
doesn't cause too much of an issue. In the future when the interface is
converted to use pgprot_t directly this can be re-enabled for the other
parts, too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This kills off the ancient p3_ioremap(), converting over to the more
generic ioremap_prot() instead.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This is already taken care of in the top-level ioremap, and now that
no one should be calling ioremap_fixed() directly we can simply throw the
mapping displacement in as an additional argument.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Presently 'flags' gets passed around a lot between the various ioremap
helpers and implementations, which is only 32-bits. In the X2TLB case
we use 64-bit pgprots which presently results in the upper 32bits being
chopped off (which handily include our read/write/exec permissions).
As such, we convert everything internally to using pgprot_t directly and
simply convert over with pgprot_val() where needed. With this in place,
transparent fixmap utilization for early ioremap works as expected.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The mem_init_done test makes sure that this path is only entered in
__init cases, so leaving ioremap_fixed() as __init and flagging the
caller __init_refok is sufficient.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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iounmap() should balance whatever is done by ioremap(). Presently
ioremap() can do any of fixed mappings, PMB mappings, or page table
mappings. Presently only the latter two are handled through the standard
unmap path, so tie in the fixed unmapping, too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This converts iounmap_fixed() to return success/error if it handled the
unmap request or not. At the same time, drop the __init label, as this
can be called in to later.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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There is nothing of interest in the _64 version anymore, so the _32 one
can be renamed and used unconditionally.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Presently the fixed ioremap API is only defined when CONFIG_IOREMAP_FIXED
is set. As we want to call in to it unconditionally, provide a stubbed
out interface.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds in a mem_init_done to work out when a standard ioremap() is
possible, falling back to the fixmap based ioremap otherwise.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This tosses in a local_irq_enable()/disable() pair around the init_fpu()
callsite in the FPU state restore exception handler. Fixes up a slab BUG
triggered by making a slab cache allocation that can sleep whilst
irqs_disabled(). This follows the behaviour undertaken by the x86
implementation.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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More and more boards are going to start shipping that boot with the MMU
in 32BIT mode by default. Previously we relied on the bootloader to
setup PMB mappings for use by the kernel but we also need to cater for
boards whose bootloaders don't set them up.
If CONFIG_PMB_LEGACY is not enabled we have full control over our PMB
mappings and can compress our address space. Usually, the distance
between the the cached and uncached mappings of RAM is always 512MB,
however we can compress the distance to be the amount of RAM on the
board.
pmb_init() now becomes much simpler. It no longer has to calculate any
mappings, it just has to synchronise the software PMB table with the
hardware.
Tested on SDK7786 and SH7785LCR.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This tidies up the iounmap path with consolidated checks for
nontranslatable mappings. This is in preparation of unifying
the implementations.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Use the fixmap-based memory mapping implementation for SH-5's ioremap()
functions and delete the old static allocator that was borrowed from
sparc.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
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We need to write to the DRAM config register very early and at such an
early stage ioremap() is not available. So use ioremap_fixed() to map
the register.
The reason that we are avoiding using the legacy P2 mapping is that
there will come a day when the legacy P2 mappings no longer exist.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
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Some devices need to be ioremap'd and accessed very early in the boot
process. It is not possible to use the standard ioremap() function in
this case because that requires kmalloc()'ing some virtual address space
and kmalloc() may not be available so early in boot.
This patch provides fixmap mappings that allow physical address ranges
to be remapped into the kernel address space during the early boot
stages.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
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Generalise the code for setting and clearing pte's and allow TLB entries
to be pinned and unpinned if the _PAGE_WIRED flag is present.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
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We need some more page flags to hook up _PAGE_WIRED (and eventually
other things). So use the unused PTE bits above the PPN field as no
implementations use these for anything currently.
Now that we have _PAGE_WIRED let's provide the SH-5 functions for wiring
up TLB entries.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
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Provide a new extended page flag, _PAGE_WIRED and an SH4 implementation
for wiring TLB entries and use it in the fixmap code path so that we can
wire the fixmap TLB entry.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
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Previously this was only built in for Urquell boards, but the same
approach can be used on SDK7786 now that the mode pin reading is
supported, so make it generic to SH7786.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This wires up the mode pins support on the SDK7786. The pins are
standard SH7786 pins, and all are fixed in software. Needed for the
clock framework, PCIe, and so forth.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Presently the secondary CPU entry point is only aimed at 29bit phys mode,
causing it to point to a stray virtual address in 32bit mode. Fix it up
after consulting with our shiny new __in_29bit_mode().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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