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When this option is enabled the driver will try to allocate the
buffer descriptors (BDs) to the L2 SRAM memory, using the
powerpc/85xx cache-sram support API for the P1/P2 QorIQ platforms.
For this to work, the size and the address of the SRAM region
must be provided as kernel boot params.
Should the attempt to allocate in L2 SRAM fail, the driver falls
back to normal allocation of BDs as before (i.e. to DDR).
The gfar_l2sram_en driver module param is provided to allow to
disable the allocation to L2 SRAM at driver level (enabled by
default).
Sysfs stubs allow to enable/diable allocation of BDs to L2 SRAM
for individual gianfar devices, as the L2 SRAM is an expensive
resource. By default, each device has this feature enabled.
This feature also disables the BD L2 stasing feature by default.
Stasing however may still be configured per device via sysfs.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Change-Id: Ie967cd24c2c6d6654b33d175be0d9e3c785c324a
Reviewed-on: http://git.am.freescale.net:8181/2596
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Gupta Rajan-B15745 <rajan.gupta@freescale.com>
Reviewed-by: Sovaiala Cristian-Constantin-B39531 <Cristian.Sovaiala@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Patch enhances the Gianfar driver performance for the packets that are
received by the driver and transmitted by the driver in the same context.
Performance is enhanced by exchanging the buffer between the Tx and Rx rings,
rather than allocating buffer from kernel or taking it from recycle queue.
Patch keeps the TX interupt masked by default and skb cleanup is done in the
xmit function just before skb is recybled back to the RX ring.
TX interupt is unmasked only when H/W transmit queue is full, in TX interupt
handler stopped tx queues are started again when the H/W has cleaned the TX buffer rings.
As TX interups are disabled by default, RFC1588 timestamping is not done and 1588 ptp
protocol doesnot works with this optimization.
Patch gives best performance with DEFAULT_RX_RING_SIZE 32, DEFAULT_TX_RING_SIZE 32,
and GFAR_DEV_WEIGHT 32.
Patch improves the forwarding performance of offload implementation like ASF by around 50%
and linux forwarding performance by 20%.
Change-Id: Ie28858fc9b9ea0434c1242843abd7479a31a0de3
Signed-off-by: Rajan Gupta <rajan.gupta@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/1619
Reviewed-by: Manoil Claudiu-B08782 <claudiu.manoil@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Add fmd19 codebase, plus a minimal set of sources from dpaa-eth,
necessary for bare compilation
Change-Id: I390df8717671204e3d98a987135393bef4534e95
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/1029
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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The Freescale mEMAC supports operating at 10/100/1000/10G, and
its associated MDIO controller is likewise capable of operating
both Clause 22 and Clause 45 MDIO buses. It is nearly identical
to the MDIO controller on the XGMAC, so we just modify that
driver.
Portions of this driver developed by:
Sandeep Singh <sandeep@freescale.com>
Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Change-Id: Ib47ab4a081a9095f7332e96e5eeb0fc7663104dd
Reviewed-on: http://git.am.freescale.net:8181/909
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Beside imx6q, the kernel built from imx_v6_v7_defconfig is also
supposed to be running on other IMX SoCs that do not have the PTP
block. Before fec driver gets fixed to run-time detect target hardware
rather than conditional compiling with #ifdef CONFIG_FEC_PTP, let's
give it a quick fix in Kconfig to forbid FEC_PTP on those IMX SoCs that
do not support PTP.
Reported-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Remove PPS.
Limit FEC_PTP option for i.MX chip only.
FEC_PTP default is on at mx6 platform.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Acked-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds a driver for the FEC(MX6) that offers time
stamping and a PTP haderware clock. Because FEC\ENET(MX6)
hardware frequency adjustment is complex, we have implemented
this in software by changing the multiplication factor of the
timecounter.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Similar to fsl_pq_mdio.c, this driver is for the 10G MDIO controller on
Freescale Frame Manager Ethernet controllers.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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If one only selects mx23-based boards, compile fails:
drivers/net/ethernet/freescale/fec.c:410:2: error: 'FEC_HASH_TABLE_HIGH' undeclared (first use in this function)
drivers/net/ethernet/freescale/fec.c:411:2: error: 'FEC_HASH_TABLE_LOW' undeclared (first use in this function)
This is because fec.h uses CONFIG_SOC_IMX28 to determine the register
layout of the core which makes sense since the MX23 does not have a fec.
However, Kconfig uses the broader ARCH_MXS symbol and this way even
makes the fec-driver default for MX23. Adapt Kconfig to use the more
precise SOC_IMX28 as well.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: David S. Miller <davem@davemloft.net>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Since commit 230dec6 (net/fec: add imx6q enet support) the FEC driver is no
longer built by default for i.MX SoCs.
Let the FEC driver be built by default again.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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i825xx and xscale are "sub" Kconfigs to NET_VENDOR_INTEL, so
NET_VENDOR_INTEL should contain ALL the dependencies of the
"sub" Kconfigs.
Same with 8390 is a "sub" Kconfig to NET_VENDOR_NATSEMI, so
NET_VENDOR_NATSEMI needs to contains ALL the dependencies.
Freescale Kconfig only had fs_enet as a sub Kconfig, and already
contained the needed dependencies, just cleaned up the dependencies.
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The imx6q enet is a derivative of imx28 enet controller. It fixed
the frame endian issue found on imx28, and added 1 Gbps support.
It also fixes a typo on vendor name in Kconfig.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Based on finds for Stephen Rothwell, where current defconfig's
enable a ethernet driver and it is not compiled due to the newly
added NET_VENDOR_* component of Kconfig.
This patch enables all the "new" Kconfig options so that current
defconfig's will continue to compile the expected drivers. In
addition, by enabling all the new Kconfig options does not add
any un-expected options.
CC: Stephen Rothwll <sfc@canb.auug.org.au>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Move the Freescale drivers into drivers/net/ethernet/freescale/ and
make the necessary Kconfig and Makefile changes.
CC: Sandeep Gopalpet <sandeep.kumar@freescale.com>
CC: Andy Fleming <afleming@freescale.com>
CC: Shlomi Gridish <gridish@freescale.com>
CC: Li Yang <leoli@freescale.com>
CC: Pantelis Antoniou <pantelis.antoniou@gmail.com>
CC: Vitaly Bordug <vbordug@ru.mvista.com>
CC: Dan Malek <dmalek@jlc.net>
CC: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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