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2014-03-21crypto: caam - Enabled QI Support for SECNitesh Lal
At the time of merging few changes required for enabling QI support were missed. This patch adds those missing changes and hence enables QI support for SEC. Signed-off-by: Nitesh Lal <NiteshNarayanLal@freescale.com> Change-Id: I190ed1452317cb1f70faaf85f8a69be0a0c5a376 Reviewed-on: http://git.am.freescale.net:8181/9922 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-21Ensure that the EQCR Cache Enabled Consumed Index is resetRoy Pledge
The QMan block keeps an internal copy of the CI index when stashing is enabled. In order to synchronize this internal copy with the external view the stash threshold must be set to 1 then 0 otherwise the state of the portal can be bad when it is reallocated by a different process Signed-off-by: Roy Pledge <Roy.Pledge@freescale.com> Change-Id: I1b4c0c7f385abb94ae3ff5e988179f0d328e3455 Reviewed-on: http://git.am.freescale.net:8181/9942 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Haiying Wang <Haiying.Wang@freescale.com> Reviewed-by: Geoff Thorpe <Geoff.Thorpe@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-21powerpc/mpc85xx: fix a build issue when user use mpc85xx_defconfigWang Dongsheng
if we enable cpufreq feature we will get a build error. drivers/cpufreq/mpc85xx-cpufreq.c: In function 'p1022_set_pll': drivers/cpufreq/mpc85xx-cpufreq.c:145:2: error: implicit declaration of function 'get_hard_smp_processor_id' [-Werror=implicit-function-declaration] It's miss a include <asm/smp.h> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Change-Id: I805969b909e269fcfeb1abce30b987baf9c60399 Reviewed-on: http://git.am.freescale.net:8181/9453 Reviewed-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-18iommu/fsl: Support for setting up PMAN PAACE entry.Varun Sethi
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I3aeb4ab1c4f91d5a1367fbe8f6ca31fe80357754 Reviewed-on: http://git.am.freescale.net:8181/9620 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-18iommu/fsl: Enable OMT cache, before invalidating PAACT and SPAACT cache.Varun Sethi
Enable OMT cache, before invalidating PAACT and SPAACT cache. This is a PAMU hardware errata work around. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: Iecf8dfcbf0ccc535dff4825a046b2badc660ec8b Reviewed-on: http://git.am.freescale.net:8181/9619 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-18fsl/qman: Modifications for new stash attribute setup API.Varun Sethi
An additional parameter (window number) is required for API. Add the window number parameter while invoking the API. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I7ff2552bf15bee25a7e41fd5e0a1781a323aceed Reviewed-on: http://git.am.freescale.net:8181/9618 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-18iommu/fsl: PAMU driver changes for DSP stasing support.Varun Sethi
Modifications to PAMU driver for supporting DSP stashing. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I1462806c85f0f398a332ac321bb7b67a8cabc1bb Reviewed-on: http://git.am.freescale.net:8181/9617 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-18iommu/fsl: Setup operation mapping for FMAN.Varun Sethi
Setup operation mapping for FMAN. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I1803c366979a28fe3f547526ee0e2f23a5dd03b7 Reviewed-on: http://git.am.freescale.net:8181/9616 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-18iommu/fsl : Factor out default PAACE setup code andVarun Sethi
enable all LIODNs. Factor out default PAACE entry setup code and enable all LIODNs for handling the autonomous case. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I31b81576e590569be614511b27d09f01cc4fcf86 Reviewed-on: http://git.am.freescale.net:8181/9615 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-17crypto: caam - use NAPI instead of taskletNitesh Lal
This patch updates the current tasklet implementation to NAPI so as the system is more balanced in the terms that the packet submission and the packet forwarding after being processed can be done at the same priority Signed-off-by: Naveen Burmi <naveenburmi@freescale.com> rebased and tuned NAPI_WEIGHT. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> (cherry picked from commit c74e14d7ff270f8d85c7988e9286f64b721f34ee) Change-Id: I3a31db49a1a6060b3ad5cd0fc4ee4044858438bc Reviewed-on: http://git.am.freescale.net:8181/520 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Signed-off-by: Nitesh Lal <NiteshNarayanLal@freescale.com> Change-Id: I685d687d89a53387287912cd2273f8c1d6a6e4e4 Reviewed-on: http://git.am.freescale.net:8181/9753 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Vakul Garg <vakul@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-17fsl_pci_ep: update fsl_pci_ep.c according to kernel changesMinghuan Lian
1. Now in kernel the dev_attrs field is removed from struct class, and is converted to use dev_groups. So the patch uses pci_ep_groups instead of pci_ep_attrs. 2. The field pci_mem_offset of struct pci_controller has been changed to mem_offset[], so the patch update the related code. 3. Remove is_pcie initialization for this field has been removed from struct pci_dev. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Change-Id: I9a664b79a1528b52728dae60a929afe4b62aa8c2 Reviewed-on: http://git.am.freescale.net:8181/9607 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Tiefei Zang <tie-fei.zang@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-17fsl_pci_ep: fix ATMU window attribute settingMinghuan Lian
If window size is 0, the bits of size will be 0xffffffff, so window attribute will be set a wrong value. The patch fixes this issue. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Change-Id: Ieac8428eb1b41a245c89637186d4eb27eedcff55 Reviewed-on: http://git.am.freescale.net:8181/9606 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Tiefei Zang <tie-fei.zang@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-17fsl_pci_ep: add MSIX supportMinghuan Lian
1. The patch initializes MSIX trap outbound window, the application can map this window and trigger the MSIX interrupt. 2. The patch initializes MSIX inbound window which is used to store MSIX vector and PBA data. 3. Add sysfs node to display MSIX vector setting for example: # cat /sys/class/pci_ep/pci0-pf0/msix MSIX venctor 0: control:0x0 data:0x0000406c addr:0x00000000fee00000 MSIX venctor 1: control:0x0 data:0x0000407c addr:0x00000000fee00000 MSIX venctor 2: control:0x0 data:0x0000408c addr:0x00000000fee00000 MSIX venctor 3: control:0x0 data:0x0000409c addr:0x00000000fee00000 MSIX venctor 4: control:0x0 data:0x000040ac addr:0x00000000fee00000 MSIX venctor 5: control:0x0 data:0x00000000 addr:0x0000000000000000 MSIX venctor 6: control:0x0 data:0x00000000 addr:0x0000000000000000 MSIX venctor 7: control:0x0 data:0x00000000 addr:0x0000000000000000 Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Change-Id: I18a6f9056b3c630bba91f5f1dfef2eee01995926 Reviewed-on: http://git.am.freescale.net:8181/9605 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-17fsl_pci_ep: add VF ATMU access supportMinghuan Lian
All VFs of a PF share the common inbound/outbound windows except translation registers of outbound windows. A VF can only change translation registers of outbound windows. A PF can change all ATMU of VF. The patch provides VF ATMU register definition and provides interfaces to access inbound/outbound windows. It also adds PCI_EP_REGION_MEM type to return PF's memory resource. The application can get and reassign the memory resource to VF. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Change-Id: Iec877a8054ac47b64d9d94abb9bc32dc0450211e Reviewed-on: http://git.am.freescale.net:8181/9604 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Tiefei Zang <tie-fei.zang@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-17fsl_pci_ep: initialize PF and VF ATMUMinghuan Lian
The first PCI controller of T4 has two physical functions(PF). Each physical functions supports 64 virtual functions(VF). There may be multiple functions to share PCI memory resource. The patch first disables all the inbound/outbound windows then, divides the PCI memory resource equally among all functions and enable a PF/VF outbound window to cover assigned memory. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Change-Id: I84f2211438f1dae32a32d22c4ac60f3f53993159 Reviewed-on: http://git.am.freescale.net:8181/9603 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Tiefei Zang <tie-fei.zang@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-17fsl_pci_ep: fix PCI configuration accessMinghuan Lian
PCI controller which supports SR_IOV and works in End Point mode provides a different method to access configuration. It dose not use bus number device number and function number, instead, it uses physical function number and virtual function number. Different PF may use different offset and stride. It is hard to calculate PF VF number by bus and device number. The original calculation is not suitable for all situations. The patch traverse all functions to find the correct PF VF number. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Change-Id: Id4a475114c24775d1098483e727a6f824ecada05 Reviewed-on: http://git.am.freescale.net:8181/9602 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Tiefei Zang <tie-fei.zang@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-17fsl_pci_ep: fix checking PCI register sizeMinghuan Lian
For T4240, the first PCI controller whose register size is 0x10000, has two physical functions and each physical function register size is 0x2000. But for some older platform PCI controller size is 0x1000 less than 0x2000. The original checking of PCI register size is mistaken. The patch is to fix this issue. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Change-Id: I089adfb5f31f09f57ea1c2ee29572ac3c68992f4 Reviewed-on: http://git.am.freescale.net:8181/9601 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Tiefei Zang <tie-fei.zang@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-13gianfar: Add skb recyclingClaudiu Manoil
Add global per-CPU skb recycle lists to improve packet forwarding throughput. Having per-interface recycle lists doesn't allow skb recycling when you're e.g. unidirectionally routing from eth0 to eth1, as eth1 will be producing a lot of recycled skbuffs but eth0 won't have any skbuffs to allocate from its recycle list. Reclaiming resp. recycling of skbs is done on the Rx resp. Tx confirmation paths, in softirq context, and the access to the driver's per-CPU skb lists is lockless and preemption safe. The skb recycling support was removed from the mainline kernel (starting with v3.0). Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Change-Id: I40d47d1d4da337f4e9b0b18136848aa807fc24f7 Reviewed-on: http://git.am.freescale.net:8181/9707 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Rajan Gupta <rajan.gupta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-13spi/fsl-espi: fix the return value judgment of irq_of_parse_and_mapHou Zhiqiang
Signed-off-by: Hou Zhiqiang <b48286@freescale.com> Change-Id: Ieb821f465dd8dd6b63264208c9eaf7d41ffb5cc8 Reviewed-on: http://git.am.freescale.net:8181/9580 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-13spi/fsl-espi: Add Power Management support for eSPI controllerHou Zhiqiang
Add PM support for eSPI controller using callback function suspend and resume in .driver.pm of platform_driver. Signed-off-by: Hou Zhiqiang <b48286@freescale.com> Change-Id: Ibc1dbdbe830f136ffc26a3610f6a4a1581e0e8cb Reviewed-on: http://git.am.freescale.net:8181/9579 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-12gianfar: Fix multi-queue support checks @probe()Claudiu Manoil
priv is not instantiated at gfar_of_init() time, when parsing the DT for info on supported HW queues. Before the netdev can be allocated, the number of supported queues must be known. Because the number of supported queues depends on device type, move the compatibility checks before netdev allocation. Local vars are used to hold the operation mode info before netdev allocation. This fixes the null accesses for priv->.., in gfar_of_init. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net> Change-Id: I7b3c4c65196bb443d7e1eccf01ef0a2b5cf6f193 Reviewed-on: http://git.am.freescale.net:8181/9706 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
2014-03-12gianfar: Use Single-Queue polling for "fsl,etsec2"Claudiu Manoil
For the "fsl,etsec2" compatible models the driver currently supports 8 Tx and Rx DMA rings (aka HW queues). However, there are only 2 pairs of Rx/Tx interrupt lines, as these controllers are integrated in low power SoCs with 2 CPUs at most. As a result, there are at most 2 NAPI instances that have to service multiple Tx and Rx queues for these devices. This complicates the NAPI polling routine having to iterate over the mutiple Rx/Tx queues hooked to the same interrupt lines. And there's also an overhead at HW level, as the controller needs to service all the 8 Tx rings in a round robin manner. The combined overhead shows up for multi parallel Tx flows transmitted by the kernel stack, when the driver usually starts returning NETDEV_TX_BUSY leading to NETDEV WATCHDOG Tx timeout triggering if the Tx path is congested for too long. As an alternative, this patch makes the driver support only one Tx/Rx DMA ring per NAPI instance (per interrupt group or pair of Tx/Rx interrupt lines) by default. The simplified single queue polling routine (gfar_poll_sq) will be the default napi poll routine for the etsec2 devices too. Some adjustments needed to be made to link the Tx/Rx HW queues with each NAPI instance (2 in this case). The gfar_poll_sq() is already successfully used by older SQ_SG_MODE (single interrupt group) controllers. This patch fixes Tx timeout triggering under heavy Tx traffic load (i.e. iperf -c -P 8) for the "fsl,etsec2" (currently the only MQ_MG_MODE devices). There's also a significant memory footprint reduction by supporting 2 Rx/Tx DMA rings (at most), instead of 8, for these devices. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net> Change-Id: Id9a2f2737ea0d1d0413e68c6401d86d43a7dc237 Reviewed-on: http://git.am.freescale.net:8181/9705 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
2014-03-12gianfar: Separate out the Tx interrupt handling (Tx NAPI)Claudiu Manoil
There are some concurrency issues on devices w/ 2 CPUs related to the handling of Rx and Tx interrupts. eTSEC has separate interrupt lines for Rx and Tx but a single imask register to mask these interrupts and a single NAPI instance to handle both Rx and Tx work. As a result, the Rx and Tx ISRs are identical, both are invoking gfar_schedule_cleanup(), however both handlers can be entered at the same time when the Rx and Tx interrupts are taken by different CPUs. In this case spurrious interrupts (SPU) show up (in /proc/interrupts) indicating a concurrency issue. Also, Tx overruns followed by Tx timeout have been observed under heavy Tx traffic load. To address these issues, the schedule cleanup ISR part has been changed to handle the Rx and Tx interrupts independently. The patch adds a separate NAPI poll routine for Tx cleanup to be triggerred independently by the Tx confirmation interrupts only. Existing poll functions are modified to handle only the Rx path processing. The Tx poll routine does not need a budget, since Tx processing doesn't consume NAPI budget, and hence it is registered with minimum NAPI weight. NAPI scheduling does not require locking since there are different NAPI instances between the Rx and Tx confirmation paths now. So, the patch fixes the occurence of spurrious Rx/Tx interrupts. Tx overruns also occur less frequently now. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net> Change-Id: I6951e2a4b057519a966214e7d7e874cc9524123a Reviewed-on: http://git.am.freescale.net:8181/9704 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
2014-03-12fsl/usb: Modify PHY_CLK_VALID bit usageRamneek Mehresh
PHY_CLK_VALID bit is de-featured for all controller versions before 2.4, and is only to be used for internal UTMI phy Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Change-Id: Ie1f5d9f6f75f759e482e6ff39a557ee888ee66ae Reviewed-on: http://git.am.freescale.net:8181/9299 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Suresh Gupta <suresh.gupta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-12crypto: caam - Fix crash in caamalg_qi module_initNitesh Lal
Added NULL check for private structure in caamalg_qi module. It is NULL when the caam driver fails to properly initialize (e.g. RNG4 init failed), then the module should gracefully do a failed initialization. Signed-off-by: Nitesh Lal <NiteshNarayanLal@freescale.com> Change-Id: Ief8596b9fcc5e16384e4b71ae70ec19b959ea201 Reviewed-on: http://git.am.freescale.net:8181/9578 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Yashpal Dutta <yashpal.dutta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-07fmd: fix flow id classification to work after PCD re-init"Mandy Lavi
For KG & Policer: Renamed pointedOwners --> RequiredActionFlag changed from counter to flag added flag clear at delete Change-Id: I55dd4125202d59e7659a3ffb8e39f56eaac7cd62 Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9261 Reviewed-by: Eyal Harari <Eyal.Harari@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9449
2014-03-07fmd: extend workaround of fman reset on t208x and t4160v2Shengzhou Liu
The same hang issue was observed on T208x and T4160v2 also. So extend the workaround for now. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Change-Id: If75d58a3d609f3607050c0cf306d9c86aa69cfaf Reviewed-on: http://git.am.freescale.net:8181/7205 Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9450 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
2014-03-07FMD: DSAR: added accumulate mode when entering deep sleepEyal Harari
Change-Id: Iad7a7c608e738661c1a9205fa2da45681ab2bc84 Signed-off-by: Eyal Harari <Eyal.Harari@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9305 Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com> Reviewed-by: Sunil Kumar Kori <Sunil.Kori@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9446
2014-03-07fmd: adjust allocation of fifo resources for fmanv3lMandy Lavi
Change-Id: I249456d0f157547fab221286e1c18e59ce5345d3 Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9257 Reviewed-by: Igal Liberman <Igal.Liberman@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9448
2014-03-07FMD: DSAR: Establish the auto-response driverEyal Harari
- New code for auto-response - Changed parser init - Added DsarCheckParams and fm_port_dsar_dump_regs - Added snmp support - Added statistics features - Fixed SNMP oid table - Removed usage of create_proc_entry - for merging to master Change-Id: Icd6292c8d68ddb4ee60ecfed87419c1f4cbf5e74 Signed-off-by: Eyal Harari <Eyal.Harari@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/8711 Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com> Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9445
2014-03-07fmd: fix mis-assignment of compat and pcd structuresMandy Lavi
Fixes memory corruption issues within lnxwrp_ioctls_fm.c Caused by wrong usage of some data structures. Change-Id: I75b710dd5888cc6ab3b86f0604cd5ef177396e23 Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9041 Reviewed-by: Nir Erez <nir.erez@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9386 Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com>
2014-03-06fmd: correct compilation warning in lnxwrp_sysfs_fm_port.c Mandy Lavi
Change-Id: I1d0661f217d96c530ad03e797be85edf2c8a3b1e Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9077 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Nir Erez <nir.erez@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 431aea6cc98e1c0350214dc3bdb2a32269307211) Change-Id: I1d0661f217d96c530ad03e797be85edf2c8a3b1e Reviewed-on: http://git.am.freescale.net:8181/9431 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-06Only initalize fragment owner when fragement is first createdRoy Pledge
When a USDPAA memory fragment is mapped into a user space process the owner should only be initialized if the fragment has just been created. Failure to do this will cause an error if another process is using the fragment when the mapping is done. Signed-off-by: Roy Pledge <Roy.Pledge@freescale.com> Change-Id: I0fdeb195f5d1910ec70f6f56d772dd2b8cedab4c Reviewed-on: http://git.am.freescale.net:8181/9427 Reviewed-by: Haiying Wang <Haiying.Wang@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-05Add support for raw portal allocationRoy Pledge
Add support for allocation of raw (unconfigured) portals to the USDPAA kernel driver. This allows a USDPAA process to allocate a portal on behalf of another user. Signed-off-by: Roy Pledge <Roy.Pledge@freescale.com> Change-Id: I5764ff1f8e46c8d22cb28367a70ce5a83a8ede85 Reviewed-on: http://git.am.freescale.net:8181/9381 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Vakul Garg <vakul@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-05fmd: add wake-on-lan support Mandy Lavi
Change-Id: I1898186679983caccc4e51a8674ee7909955e346 Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9076 Reviewed-by: Igal Liberman <Igal.Liberman@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 19640982a1c57f9f81508f9fa15dcc6ec1841cb4) Change-Id: I1898186679983caccc4e51a8674ee7909955e346 Reviewed-on: http://git.am.freescale.net:8181/9385 Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-05fmd: change port_frame counter printout to unsigned Mandy Lavi
Change-Id: I308873aa47e84169f51840b10340da30a5689d36 Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/8638 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Nir Erez <nir.erez@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 6d27c61eccf7b68e5bdcb751f8bc829e9317da47) Change-Id: I308873aa47e84169f51840b10340da30a5689d36 Reviewed-on: http://git.am.freescale.net:8181/9384 Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-05fmd: add PPP header type to the list of headers to be handled Mandy Lavi
Change-Id: I7347668005c7979c2c64a97cbf05c16faddff49a Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/7945 Tested-by: Richard Schmitt <richard.schmitt@freescale.com> Reviewed-by: Nir Erez <nir.erez@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 978622644e30299070942ff53c9908c1c01e59e4) Change-Id: I7347668005c7979c2c64a97cbf05c16faddff49a Reviewed-on: http://git.am.freescale.net:8181/9383 Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-05fmd: memac: add tx_fifo_sections register initialization Mandy Lavi
B4/T4 rev2 introduced two new registers in memac block named: RX_FIFO_SECTIONS and TX_FIFO_SECTIONS TX_FIFO_SECTIONS[TX_AVAIL] field requires a specific (non default) init value when working with 10g interface (0x19) Change-Id: Ic577e24d10031b2f2f1697006a6d5be52db19f4e Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/6882 Reviewed-by: Haiying Wang <Haiying.Wang@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com> (cherry picked from commit 2818e16b8a8c4f49ef8c7438505f0dc952b3d46f) Change-Id: Ic577e24d10031b2f2f1697006a6d5be52db19f4e Reviewed-on: http://git.am.freescale.net:8181/7386 Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit fc1388287f2ad1566be2b7c8c6897a277e96ca98) Change-Id: Ic577e24d10031b2f2f1697006a6d5be52db19f4e Reviewed-on: http://git.am.freescale.net:8181/9382 Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-05dpaa_eth: enable ethtool control of PAUSE frame autonegotiationCristian Bercaru
This patch enables the ethtool control of PAUSE frame autonegotiation. ethtool calculats symmetric/asymmetric PAUSE frame capabilities based on the PAUSE RX/TX settings it receives. If the the capabilities differ from the previous, it forces link renegotiation and triggers the advertisment of the new values. If autonegotiation is disabled, ethtool enforces RX/TX PAUSE settings for the FMan port. Else, RX/TX is determined from the negotiated symmetric/asymmetric capabilities. Signed-off-by: Cristian Bercaru <cristian.bercaru@freescale.com> Change-Id: I7b2cba1813f44b97f67885e7d7fe575859db61e0 Reviewed-on: http://git.am.freescale.net:8181/8722 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-05Fix power of two check and most significant bit determination forVarun Sethi
64 bit types the PAMU driver. is_power_of_2 requires an unsigned long parameter which would lead to truncation of 64 bit values on 32 bit architectures. __ffs also expects an unsigned long parameter thus won't work for 64 bit values on 32 bit architectures. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I01c043a04ad5b66cdf30673292ffa099be1c7996 Reviewed-on: http://git.am.freescale.net:8181/9300 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-05dpa_offload: Fix build error in dpa_ipsecMarian Chereji
A build error occurs in dpa_ipsec since the commit "dpa_ipsec: Patch to update the append_math_ldshift command" due to an incomplete fix. This patch did not replace all occurences of "append_math_ldshift" call. Signed-off-by: Andrei Varvara <andrei.varvara@freescale.com> Signed-off-by: Marian Chereji <marian.chereji@freescale.com> Change-Id: I11e14418cc91b25918943a8e06563bf528ffe790 Reviewed-on: http://git.am.freescale.net:8181/9370 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-05dpa_offload: Fix in IPSec wrapper regarding dpa_ipsec_get_statsAndrei Varvara
When doing the Multiple IPSec instances implementation I had to change the API for dpa_ipsec_get_stats which did not received as parameter the intance ID. Unfortunately when updating the IPSec wrapper I forgot to update also in case of compat mode. Signed-off-by: Andrei Varvara <andrei.varvara@freescale.com> Change-Id: I6acddda0e54d1c5e6c1b47122d81559ecd0cf0f3 Reviewed-on: http://git.am.freescale.net:8181/9369 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Marian-Cornel Chereji <marian.chereji@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-05crypto: caam - UIO JR driver should be enabled by defaultAlex Porosanu
With the addition of US PDCP SEC driver as part of SDK 1.6, the UIO JR driver needs to be enabled, thus some of the JRs from kernel can be exposed via UIO to userspace. Change-Id: I8aa6988a2bab452bb3fa081f495d76d380c64d2e Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/8472 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-05crypto: caam - Dynamic memory allocation for caam_rng_ctx objectNitesh Lal
This patch allocates memory from DMAable region to the caam_rng_ctx object, earlier it had been statically allocated which resulted in errorneous behaviour on inserting the caamrng module at the runtime. Signed-off-by: Nitesh Lal <NiteshNarayanLal@freescale.com> Change-Id: I5706dfeb5a7ba15bb9a757d64f239fbc1568e1ce Reviewed-on: http://git.am.freescale.net:8181/9324 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-04mpc85xx: unify the data collection module driverTang Yuantian
This patch updated the data collection module driver. It removed all the hard-coded parameters by detecting automatically. Adding new board support will be easier in this way. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Change-Id: Ibb67c243faac53fee7865154e0fdb703933ace3f Reviewed-on: http://git.am.freescale.net:8181/8991 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Hongtao Jia <hongtao.jia@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-03dpa_offload: Add DPA IPSec Multiple Instances supportAndrei Varvara
Implemented the code needed to support multiple intances of DPA IPSec. Basically the IPSec was using only one FMAN and if the boards had multiple FMANs they could not be used. Thanks to this patch the IPSec is now able to create multiple intances using as much of FMAN as available. Signed-off-by: Andrei Varvara <andrei.varvara@freescale.com> Change-Id: I98f25f45f1949ce9e922837ae5824e2b186916f2 Reviewed-on: http://git.am.freescale.net:8181/9262 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Marian-Cornel Chereji <marian.chereji@freescale.com> Reviewed-by: Nicolae-Sebastian Grigore <sebastian.grigore@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-03dpaa_eth: add MAC PAUSE frames autonegotiation supportCristian Bercaru
PHY devices advertise symmetric/asymmetric PAUSE frame capabilities to their peers. This patch changes the 'adjust_link' function behavior. When a change occurs in the advertised or remote capabilities and PAUSE frame autonegotiation is enabled, the FMan port adjusts PAUSE frames reception and transmission depending on these settings. When PAUSE autonegotiation is disabled, the FMan interface adjusts PAUSE frames RX/TX depending on the values in the 'mac_device'. Signed-off-by: Cristian Bercaru <cristian.bercaru@freescale.com> Change-Id: I360ad283e2820d9f681f66606abf073f1c0708a9 Reviewed-on: http://git.am.freescale.net:8181/8721 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-03dpa_offload: Add new DTS for supporting DPA IPSec Multiple InstancesAndrei Varvara
The new feature of IPSec, multiple instances require additional FMAN resources in order to initialize, create multiple instances and test using trafic the newly added feature. Basically it is required to add another 3 offline ports from the other FMAN (fman 0). Aditional it requires another macless device, since USDPAA can't reuse the macles given as input for first initialized DPA IPSec instance. And finally the ethernet 1 has to be initialize by the USDPPA. Change-Id: Ice624be15a98bd120ee53b57f266dac1db0ba3ac Signed-off-by: Andrei Varvara <andrei.varvara@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9264 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Marian-Cornel Chereji <marian.chereji@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-03fsl_qbman: Fix warning if lockdep is enabled in kernel configAlex Porosanu
When CONFIG_LOCKDEP is set to yes, the following WARNING is generated: WARNING: at kernel/lockdep.c:2986 Modules linked in: NIP: c00000000008d3a0 LR: c00000000008d380 CTR: c000000000317130 REGS: c0000000791071d0 TRAP: 0700 Not tainted (3.8.13-rt9-01934-gc5021a4-dirty) MSR: 0000000080029000 <CE,EE,ME> CR: 24ad2e42 XER: 20000000 SOFTE: 1 TASK = c000000079102040[1] 'swapper/0' THREAD: c000000079104000 CPU: 7 GPR00: c00000000008d36c c000000079107450 c000000000b513e8 0000000000000001 GPR04: 0000000084ad2e44 00000000a14394ec 0000000000000008 0000000000000001 GPR08: 0000000000000000 0000000000000000 000000000000000f 0000000000000001 GPR12: 0000000022ad2e84 c00000000fffbc00 c000000000001c50 0000000000000000 GPR16: 0000000000000000 0000000000000000 0000000000000000 c0000000007a71d8 GPR20: 0000000000000100 c000000000b2c288 c00000007966b800 c00000000095f860 GPR24: c0000000007a71c0 c00000007966b820 0000000000000000 0000000000000100 GPR28: c000000000b6aef0 c0000000058ab12f c000000005d819a8 0000000000000000 NIP [c00000000008d3a0] .lockdep_init_map+0x3d0/0x580 LR [c00000000008d380] .lockdep_init_map+0x3b0/0x580 Call Trace: [c000000079107450] [c00000000008d36c] .lockdep_init_map+0x39c/0x580 (unreliable) [c000000079107520] [c000000000194eac] .sysfs_add_file_mode+0xbc/0x140 [c0000000791075e0] [c000000000198e08] .internal_create_group+0x118/0x2e0 [c000000079107690] [c0000000005c1db4] .of_fsl_bman_probe+0x294/0x320 [c000000079107770] [c00000000032e64c] .platform_drv_probe+0x2c/0x40 [c0000000791077e0] [c00000000032ca04] .driver_probe_device+0xa4/0x2b0 [c000000079107880] [c00000000032cd0c] .__driver_attach+0xfc/0x100 [c000000079107910] [c00000000032a368] .bus_for_each_dev+0x78/0xe0 [c0000000791079b0] [c00000000032c384] .driver_attach+0x24/0x40 [c000000079107a20] [c00000000032bdb8] .bus_add_driver+0x1f8/0x330 [c000000079107ac0] [c00000000032d3bc] .driver_register+0x9c/0x240 [c000000079107b60] [c00000000032e7d8] .platform_driver_register+0x68/0x80 [c000000079107bd0] [c0000000005c1e58] .bman_ctrl_init+0x18/0x30 [c000000079107c40] [c000000000001534] .do_one_initcall+0x164/0x1e0 [c000000079107cf0] [c0000000009f3c04] .kernel_init_freeable+0x188/0x270 [c000000079107db0] [c000000000001c6c] .kernel_init+0x1c/0x3b0 [c000000079107e30] [c0000000000008d0] .ret_from_kernel_thread+0x64/0x94 Instruction dump: 813c0000 2f890000 409efcf8 48226d15 60000000 2fa30000 419efce8 3d220084 3929c718 81290000 2f890000 409efcd4 <0fe00000> 4bfffccc fbde0000 7fddf378 ---[ end trace 39bdd3537239024e ]--- BUG: key c0000000058ab048 not in .data! BUG: key c0000000058ab078 not in .data! ... As per upstream commit 6992f5334995af474c2b58d010d08bc597f0f2fe, "non-static sysfs attributes need to be initialized with sysfs_attr_init or sysfs_bin_attr_init. Strictly speaking this requirement only exists when lockdep is enabled, and when lockdep is enabled we get a bit fat warning if this requirement is not met." This patch adds the necessary function call in the qbman driver for eliminating the warning. Change-Id: Ia1cb069dc551a8a47ed3682f5e8d1eb2fedb9b6c Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/8460 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-02-27dpa_offload: Update rx port to 1G in dts for T4240Aurelian Zanoschi
Changed the rx port to 1G for chosen dts file for T4240QDS platform in order to be able to run dpa_offloading applications. Signed-off-by: Aurelian Zanoschi <Aurelian.Zanoschi@freescale.com> Change-Id: Ie4fcb1748f4efff67905c72e0b9b9661295d3332 Reviewed-on: http://git.am.freescale.net:8181/9226 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Marian-Cornel Chereji <marian.chereji@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
generated by cgit v0.10.2 at 2024-11-16 20:24:56 (GMT)