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to master
* commit '300c3ff86988bc13e310b58d9c7c786528697150':
fsl-qbman: Handle memory leaks
fsl-pme: Check for null pointers
fsl-dce: Handle memory allocation failures
fsl-dce: Correct error paths and add new labels
fsl_qbman: null check for lni in qman_ceemt_sp_release
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Increasing CAAM DMA engine transaction size either
-reduces the number of required transactions or
-adds the ability to transfer more data with same transaction count
Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
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Previous change (see "Fixes" tag) to the MCFGR register clears AWCACHE[0]
(which is "1" at POR).
For PPC-based platforms, this makes all writes non-bufferable, causing
a performance drop.
Rework previous change such that MCFGR[AWCACHE] is set to:
-4'b0001 (default value at POR) for PPC-based platforms
-4'b0011 (default value at POR + AWCACHE[1]) for ARM-based platforms
Fixes: bcd586241449 ("crypto: caam - fix snooping for write transactions")
Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
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Eliminate memory leaks on error paths
Signed-off-by: Mahammad Ismayilzada <mahammad.ismayilzada@freescale.com>
Change-Id: I36d1a35f9d48188a9dad043c78e90d787997ea19
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Check for null pointers to prevent null pointer dereferencing
Signed-off-by: Mahammad Ismayilzada <mahammad.ismayilzada@freescale.com>
Change-Id: Icc267f51d5ad85187c6ee5d03aa87f8649e124c9
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Check for memory allocation failures to protect from
null pointer dereferencing
Signed-off-by: Mahammad Ismayilzada <mahammad.ismayilzada@freescale.com>
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Correct the order of existing goto labels and add new ones
to handle error paths properly for inflation process
Signed-off-by: Mahammad Ismayilzada <mahammad.ismayilzada@freescale.com>
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For JIRA issue QLINUX-3837
Signed-off-by: Hemant Agrawal <Hemant@freescale.com>
Signed-off-by: Haiying Wang <Haiying.wang@freescale.com>
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Fixing an issue that occurs when there are two root ccnodes
and both of them point to the same miss ccnode
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
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Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
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The PCIe controller should be fully initialized in spite of link
status controller and the designware driver will check it before
accessing the PCIe device. So we do not need to check link status
and the patch removed the related code.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
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This reverts commit 20af0dc3a4003cdfaaac974dfe131e030b857dcd.
Revert this non-upstreamable patch (DMACTRL[LE] hack) from
SDK1.9, to sync gianfar with following usptream u-boot fix:
git.denx.de/?p=u-boot/u-boot-arm.git/
commit: ebe4c1e6469444753bd2ba93fe63e6183cf2905c
(“ls102xa: etsec: Use proper settings for BE BDs”).
Details about the fix are documented by this uboot commit.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
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asf_qos feature to be only available for non-dpaa platform
asf_qos will not be enabled by enabling ASF.
asf_linux_qos may be used for dpaa platforms.
Signed-off-by: Alok Makhariya <B46187@freescale.com>
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On 32 bit kernels using size_t truncated the 40 bit addresses.
Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com>
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Increased TX_TIMEOUT to 5HZ to improve performance in case of Real-Time.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Abhimanyu <abhimanyu@freescale.com>
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Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
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Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
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Set CSCN_TARG with correct DCP portal in qman_create_cgr_to_dcp()
funciton for the qman revision < qman_3.0
JIRA issue# QLINUX-3814
Signed-off-by: Haiying Wang <Haiying.wang@freescale.com>
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Signed-off-by: Camelia Groza <camelia.groza@freescale.com>
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Fix two compile errors below,
error: implicit declaration of function 'of_iomap'
error: implicit declaration of function 'out_be32'
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
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It supports one critical trip point and one passive trip point.
The cpufreq is used as the cooling device to throttle CPUs when
the passive trip is crossed.
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
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As per Documentation/thermal/sysfs-api.txt, max_level
is an index, not a counter. Thus, in case a CPU has
3 valid frequencies, max_level is expected to be 2, for instance.
The current code makes max_level == number of valid frequencies,
which is bogus. This patch fix the cpu_cooling device by
ranging max_level properly.
Reported-by: Carlos Hernandez <ceh@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
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The eSDHC is not compatible with SD spec well, so we need
to use eSDHC-specific code to switch to SDR50 mode.
1. IO signal voltage switching, eSDHC uses SDHC_VS to switch
io voltage and it's needed to configure a global utilities
register SCFG_SDHCIOVSELCR(if it has) and SDHC_VS signal.
2. Before executing tuning procedure, eSDHC should set its own
tuning block.
static const struct sdhci_ops sdhci_esdhc_ops = {
...
.set_tuning_block = esdhc_set_tuning_block,
.signal_voltage_switch = esdhc_signal_voltage_switch,
};
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
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The eSDHC is not compatible with SD spec well, it's needed
to add callbacks for signal voltage switching and tuning
block setting for eSDHC for eMMC45 Adapter Card HS200 mode
support.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
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In order to ensure that the SEC ERA property is
properly read from DTS, of_property_read* functions need
to be used.
Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
Change-Id: I3fe958ca9b0ab91c2dbd089d1b2f090042cc3fd0
Reviewed-on: http://git.am.freescale.net:8181/39374
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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HW coherency won't work properly for CAAM write transactions
if AWCACHE is left to default (POR) value - 4'b0001.
It has to be programmed to 4'b0010.
For platforms that have HW coherency support:
-PPC-based: the update has no effect; CAAM coherency already works
due to the IOMMU (PAMU) driver setting the correct memory coherency
attributes
-ARM-based: the update fixes cache coherency issues,
since IOMMU (SMMU) driver is not programmed to behave similar to PAMU
Change-Id: I1f91a526c0bdf28b799d19cab9599b115cad55b3
Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/39256
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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ls1021 support QE IP block and it is arm,
So modify QE-HDLC code to adapt bothe arm and powerpc
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Change-Id: I9e02e53ae1fafffeec3bf7145309002db19c2dc1
Reviewed-on: http://git.am.freescale.net:8181/38130
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch enables the SoC level CAN loopback.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Change-Id: I5efd40f5d853d11b2476b2bbab0db66c7b1711fa
Reviewed-on: http://git.am.freescale.net:8181/38097
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch adds support for non RX-FIFO (legacy) mode in
the flexcan driver.
On certain SoCs, the RX-FIFO support might be broken, as
a result we need to fall-back on the legacy (non RX-FIFO)
mode to receive CAN frames.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Sakar Arora <Sakar.Arora@freescale.com>
Change-Id: I8b07e851b68fcca9716d02b14b6712c2da654ad5
Reviewed-on: http://git.am.freescale.net:8181/38095
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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The FlexCAN IP on certain SoCs like (Freescale's LS1021A) is modelled
in a big-endian fashion, i.e. the registers and the message buffers are
organized in a BE way.
More details about the LS1021A SoC can be seen here:
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=LS1021A&nodeId=018rH325E4017B#
This patch ensures that the register read/write APIs are remodelled to
address such cases, while ensuring that existing platforms (where the
FlexCAN IP was modelled in LE way) do not break.
Tested on LS1021A-QDS board.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Sakar Arora <Sakar.Arora@freescale.com>
Change-Id: I4116956dfc92ae565a2aea96356014c77f506c1c
Reviewed-on: http://git.am.freescale.net:8181/38094
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch adds ls1021a flexcan device entry to the flexcan driver code.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Change-Id: Iad4f7caf7be878784414d194335f203ea02743e5
Reviewed-on: http://git.am.freescale.net:8181/38093
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This reverts commit 61af51e63ff5a3666788b1c5c2d42c3df3a03c34.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Change-Id: I196e1fbc30a97ae0102b13eddd25bdf9230e02f4
Reviewed-on: http://git.am.freescale.net:8181/38091
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This reverts commit 4966cbb525a2acfb7c2782f1994949e97b45f242.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Change-Id: Ifec4963a1ed01fb60f949575e1c2be4da5c38cf6
Reviewed-on: http://git.am.freescale.net:8181/38090
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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ERRATA ERR005829 handling'
This reverts commit 0ec580b6a604a4fcfd65c3515459def643c8517a.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Change-Id: I64fb32407f7083aa433d4d7ec34d7171c2bdc02b
Reviewed-on: http://git.am.freescale.net:8181/38089
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Rather than wasting cycles read-modify-writing the interrupt enable
registers, cache the value locally instead.
This patch is from upstreaming linux, commit id
b537f94ce19583de1882f539a5cc49aa99260aca
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Change-Id: I3c1bb4d4b3f7d7dccbaa4748816bfe381edc484c
Reviewed-on: http://git.am.freescale.net:8181/37869
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Change-Id: I68ac4e509f41c249d38579b34cb78d35e9231b0f
Reviewed-on: http://git.am.freescale.net:8181/37558
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Enable interrupt mode to detect card instead of polling mode for
ls1021a by removing the quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION.
This could improve data transferring performance and avoid the call
trace caused by polling card status sometime.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Change-Id: Id965cd89b16f3f4d8327f1ca3d7ba9ed146e7a44
Reviewed-on: http://git.am.freescale.net:8181/37819
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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In LNI shaper setup, setting mps to 60 to round up the frame length
to 60 for shaper calculations, for any dequeued frame length less
than 60 bytes.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Change-Id: I88013d2ee39b3620a4e97f3366a87664ec0ea9dc
Reviewed-on: http://git.am.freescale.net:8181/37437
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Roy Pledge <roy.pledge@freescale.com>
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
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Correct NULL pointer checking for endpoint descriptor
before it gets dereferenced
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Change-Id: I449d00d49f2ae842aa256907021b95b7885ccaf5
Reviewed-on: http://git.am.freescale.net:8181/37641
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
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Add the check whether malloc allocated memory successfully or not
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@freescale.com>
Change-Id: If306002aa8541cf76286b7b78d0027c3395672a6
Reviewed-on: http://git.am.freescale.net:8181/37576
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
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Make sure that map name is null terminated when a memory map
is split and is cleared when a map is destroyed
Signed-off-by: Roy Pledge <Roy.Pledge@freescale.com>
Change-Id: If779b54817b9c2d49d6e18106b333a51ca2b2dcf
Reviewed-on: http://git.am.freescale.net:8181/37436
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
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On T1042D4RDB, system can't resume and warm reset to uboot prompt sometimes.
Disable eSPI controller hardware before enter deep sleep, and enable it
after resume.
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Change-Id: I0f091890ef3e3219697ff7f5bbf4a02809e6e45b
Reviewed-on: http://git.am.freescale.net:8181/37469
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
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For improved performance in case of unbalanced flows, all
FQs from SEC to cores were added into a pool channel. Adverse
effects have been observed for e5500 platforms. This patch
removes the creation and subsequent usage of the pool channel.
Change-Id: I49dbb93bfede16985fa2ed451cde17e7c2658648
Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/37366
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Mircea Pop <mircea.pop@freescale.com>
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
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Remove check added in previous patch to disallow size zero to be
passed from user space in dma_mem_create(). Size zero is deemed valid
if the memory region is already created and a second user wishes to
get a mapping to the existent memory.
Corrected values copied back to the user to include the length of the
memory and the flags. This is important to reflect a memory size
correction when the user passes size zero. The user can check the new
size using dma_mem_params()
Added a warning message if the user attempts to map to an existing
area in memory, but specifies a non-zero size that does not match the
original memory mapping. In the future this case will trigger an
error and the mapping will fail. Currently the behavior is to print a
warning message and the kernel passes back to user space the
corrected size.
Signed-off-by: Ahmed Mansour <Ahmed.Mansour@freescale.com>
Change-Id: Ib8535ada6f0fb616986bce3c52eae65f3bf583da
Reviewed-on: http://git.am.freescale.net:8181/37365
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Haiying Wang <Haiying.Wang@freescale.com>
Reviewed-by: Roy Pledge <roy.pledge@freescale.com>
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
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Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
Change-Id: Ife4ad017add52bdd911b373d5d8dbb55a7e680ec
Reviewed-on: http://git.am.freescale.net:8181/37122
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
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ARRAY_SIZE() returns a size_t value.
Thus, when printing these values, %zu or %zx must be used, or else
warnings show up:
CC drivers/crypto/caam//caamalg.o
In file included from include/linux/thread_info.h:11:0,
from include/linux/preempt.h:9,
from include/linux/spinlock.h:50,
from include/linux/seqlock.h:35,
from include/linux/time.h:5,
from include/linux/stat.h:18,
from include/linux/module.h:10,
from drivers/crypto/caam//compat.h:9,
from drivers/crypto/caam//caamalg.c:47:
drivers/crypto/caam//caamalg.c: In function 'caam_cra_init':
include/linux/bug.h:33:45: warning: format '%d' expects argument of type 'int', but argument 4 has type 'long unsigned int' [-Wformat=]
#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:-!!(e); }))
^
include/linux/compiler-gcc.h:47:28: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
#define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0]))
^
include/linux/kernel.h:41:59: note: in expansion of macro '__must_be_array'
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
^
drivers/crypto/caam//caamalg.c:4396:13: note: in expansion of macro 'ARRAY_SIZE'
op_id, ARRAY_SIZE(digest_size));
^
CC drivers/crypto/caam//caamhash.o
In file included from include/linux/thread_info.h:11:0,
from include/linux/preempt.h:9,
from include/linux/spinlock.h:50,
from include/linux/seqlock.h:35,
from include/linux/time.h:5,
from include/linux/stat.h:18,
from include/linux/module.h:10,
from drivers/crypto/caam//compat.h:9,
from drivers/crypto/caam//caamhash.c:56:
drivers/crypto/caam//caamhash.c: In function 'caam_hash_cra_init':
include/linux/bug.h:33:45: warning: format '%d' expects argument of type 'int', but argument 4 has type 'long unsigned int' [-Wformat=]
#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:-!!(e); }))
^
include/linux/compiler-gcc.h:47:28: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
#define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0]))
^
include/linux/kernel.h:41:59: note: in expansion of macro '__must_be_array'
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
^
drivers/crypto/caam//caamhash.c:1782:12: note: in expansion of macro 'ARRAY_SIZE'
op_id, ARRAY_SIZE(runninglen));
^
Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
Change-Id: Ica005a337d654f7d55eea6f5e5aee911cbd016b2
Reviewed-on: http://git.am.freescale.net:8181/37071
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Tudor-Dan Ambarus <tudor.ambarus@freescale.com>
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
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Change-Id: I41397d36e3966e099e53d8d5c35b2fdbd27e2055
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/36866
Reviewed-by: Igal Liberman <Igal.Liberman@freescale.com>
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
Tested-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
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Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Change-Id: Iaaf60a7e20a7cd96698fbcb3f98b5918000872e1
Reviewed-on: http://git.am.freescale.net:8181/36225
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Roy Pledge <roy.pledge@freescale.com>
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
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