From d0e05bb3d611c7c3d37cadd8c1016ee2e22beefa Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 18 May 2012 10:20:33 +0900 Subject: sh: mach-se: Migrate 7724SE off of deprecated dynamic IRQ API. The generic hardirq layer provides all of the routines that we need these days, so we don't require any of the dynamic IRQ API wrapping, and can call in to irq_alloc_descs() directly. Signed-off-by: Paul Mundt diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c index c6342ce..5d1d3ec 100644 --- a/arch/sh/boards/mach-se/7724/irq.c +++ b/arch/sh/boards/mach-se/7724/irq.c @@ -17,8 +17,10 @@ #include #include #include -#include -#include +#include +#include +#include +#include #include struct fpga_irq { @@ -111,7 +113,7 @@ static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc) */ void __init init_se7724_IRQ(void) { - int i, nid = cpu_to_node(boot_cpu_data); + int irq_base, i; __raw_writew(0xffff, IRQ0_MR); /* mask all */ __raw_writew(0xffff, IRQ1_MR); /* mask all */ @@ -121,28 +123,16 @@ void __init init_se7724_IRQ(void) __raw_writew(0x0000, IRQ2_SR); /* clear irq */ __raw_writew(0x002a, IRQ_MODE); /* set irq type */ - for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) { - int irq, wanted; - - wanted = SE7724_FPGA_IRQ_BASE + i; - - irq = create_irq_nr(wanted, nid); - if (unlikely(irq == 0)) { - pr_err("%s: failed hooking irq %d for FPGA\n", - __func__, wanted); - return; - } - - if (unlikely(irq != wanted)) { - pr_err("%s: got irq %d but wanted %d, bailing.\n", - __func__, irq, wanted); - destroy_irq(irq); - return; - } + irq_base = irq_alloc_descs(SE7724_FPGA_IRQ_BASE, SE7724_FPGA_IRQ_BASE, + SE7724_FPGA_IRQ_NR, numa_node_id()); + if (IS_ERR_VALUE(irq_base)) { + pr_err("%s: failed hooking irqs for FPGA\n", __func__); + return; + } - irq_set_chip_and_handler_name(irq, &se7724_irq_chip, + for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) + irq_set_chip_and_handler_name(irq_base + i, &se7724_irq_chip, handle_level_irq, "level"); - } irq_set_chained_handler(IRQ0_IRQ, se7724_irq_demux); irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); -- cgit v0.10.2 From 051f923d922d105f4d32e64cba1ed6f5a749d530 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 18 May 2012 23:20:09 +0900 Subject: sh: hd64461: Migrate off of deprecated dynamic IRQ API. Switches from create_irq_nr() to irq_alloc_descs(). Signed-off-by: Paul Mundt diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c index eb4ea4d..e973561 100644 --- a/arch/sh/cchips/hd6446x/hd64461.c +++ b/arch/sh/cchips/hd6446x/hd64461.c @@ -73,10 +73,7 @@ static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc) int __init setup_hd64461(void) { - int i, nid = cpu_to_node(boot_cpu_data); - - if (!MACH_HD64461) - return 0; + int irq_base, i; printk(KERN_INFO "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n", @@ -89,28 +86,16 @@ int __init setup_hd64461(void) #endif __raw_writew(0xffff, HD64461_NIMR); - /* IRQ 80 -> 95 belongs to HD64461 */ - for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) { - unsigned int irq; - - irq = create_irq_nr(i, nid); - if (unlikely(irq == 0)) { - pr_err("%s: failed hooking irq %d for HD64461\n", - __func__, i); - return -EBUSY; - } - - if (unlikely(irq != i)) { - pr_err("%s: got irq %d but wanted %d, bailing.\n", - __func__, irq, i); - destroy_irq(irq); - return -EINVAL; - } - - irq_set_chip_and_handler(i, &hd64461_irq_chip, - handle_level_irq); + irq_base = irq_alloc_descs(HD64461_IRQBASE, HD64461_IRQBASE, 16, -1); + if (IS_ERR_VALUE(irq_base)) { + pr_err("%s: failed hooking irqs for HD64461\n", __func__); + return irq_base; } + for (i = 0; i < 16; i++) + irq_set_chip_and_handler(irq_base + i, &hd64461_irq_chip, + handle_level_irq); + irq_set_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux); irq_set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW); -- cgit v0.10.2 From 3b1267b90f6b7c080024101696c0454f455761f4 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 18 May 2012 23:36:44 +0900 Subject: sh: dreamcast: Migrate off of deprecated dynamic IRQ API. Switches from create_irq_nr() to irq_alloc_descs(). Signed-off-by: Paul Mundt diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c index f63d323..2789647 100644 --- a/arch/sh/boards/mach-dreamcast/irq.c +++ b/arch/sh/boards/mach-dreamcast/irq.c @@ -8,10 +8,11 @@ * This file is part of the LinuxDC project (www.linuxdc.org) * Released under the terms of the GNU GPL v2.0 */ - #include #include -#include +#include +#include +#include #include /* @@ -141,26 +142,15 @@ int systemasic_irq_demux(int irq) void systemasic_irq_init(void) { - int i, nid = cpu_to_node(boot_cpu_data); - - /* Assign all virtual IRQs to the System ASIC int. handler */ - for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) { - unsigned int irq; - - irq = create_irq_nr(i, nid); - if (unlikely(irq == 0)) { - pr_err("%s: failed hooking irq %d for systemasic\n", - __func__, i); - return; - } + int irq_base, i; - if (unlikely(irq != i)) { - pr_err("%s: got irq %d but wanted %d, bailing.\n", - __func__, irq, i); - destroy_irq(irq); - return; - } + irq_base = irq_alloc_descs(HW_EVENT_IRQ_BASE, HW_EVENT_IRQ_BASE, + HW_EVENT_IRQ_MAX - HW_EVENT_IRQ_BASE, -1); + if (IS_ERR_VALUE(irq_base)) { + pr_err("%s: failed hooking irqs\n", __func__); + return; + } + for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) irq_set_chip_and_handler(i, &systemasic_int, handle_level_irq); - } } -- cgit v0.10.2 From b98b35815f40f01337e25e3f0d10d57b7cec5126 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Thu, 24 May 2012 15:24:39 +0900 Subject: sh: mach-x3proto: Migrate to linear irq domain. In the interest of getting off of the create_irq() API we can get all of the functionality we're interested in through a linear IRQ domain. Fairly straightforward conversion utilizing a single linear domain. Signed-off-by: Paul Mundt diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index d893411..f2024a91 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig @@ -292,6 +292,7 @@ config SH_X3PROTO bool "SH-X3 Prototype board" depends on CPU_SUBTYPE_SHX3 select NO_IOPORT if !PCI + select IRQ_DOMAIN config SH_MAGIC_PANEL_R2 bool "Magic Panel R2" diff --git a/arch/sh/boards/mach-x3proto/gpio.c b/arch/sh/boards/mach-x3proto/gpio.c index f33b2b5..3ea65e9 100644 --- a/arch/sh/boards/mach-x3proto/gpio.c +++ b/arch/sh/boards/mach-x3proto/gpio.c @@ -3,7 +3,7 @@ * * Renesas SH-X3 Prototype Baseboard GPIO Support. * - * Copyright (C) 2010 Paul Mundt + * Copyright (C) 2010 - 2012 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -26,7 +27,7 @@ #define KEYDETR 0xb81c0004 static DEFINE_SPINLOCK(x3proto_gpio_lock); -static unsigned int x3proto_gpio_irq_map[NR_BASEBOARD_GPIOS] = { 0, }; +static struct irq_domain *x3proto_irq_domain; static int x3proto_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) { @@ -49,7 +50,14 @@ static int x3proto_gpio_get(struct gpio_chip *chip, unsigned gpio) static int x3proto_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) { - return x3proto_gpio_irq_map[gpio]; + int virq; + + if (gpio < chip->ngpio) + virq = irq_create_mapping(x3proto_irq_domain, gpio); + else + virq = -ENXIO; + + return virq; } static void x3proto_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) @@ -62,9 +70,8 @@ static void x3proto_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) chip->irq_mask_ack(data); mask = __raw_readw(KEYDETR); - for_each_set_bit(pin, &mask, NR_BASEBOARD_GPIOS) - generic_handle_irq(x3proto_gpio_to_irq(NULL, pin)); + generic_handle_irq(irq_linear_revmap(x3proto_irq_domain, pin)); chip->irq_unmask(data); } @@ -78,10 +85,23 @@ struct gpio_chip x3proto_gpio_chip = { .ngpio = NR_BASEBOARD_GPIOS, }; +static int x3proto_gpio_irq_map(struct irq_domain *domain, unsigned int virq, + irq_hw_number_t hwirq) +{ + irq_set_chip_and_handler_name(virq, &dummy_irq_chip, handle_simple_irq, + "gpio"); + + return 0; +} + +static struct irq_domain_ops x3proto_gpio_irq_ops = { + .map = x3proto_gpio_irq_map, + .xlate = irq_domain_xlate_twocell, +}; + int __init x3proto_gpio_setup(void) { - int ilsel; - int ret, i; + int ilsel, ret; ilsel = ilsel_enable(ILSEL_KEY); if (unlikely(ilsel < 0)) @@ -91,21 +111,10 @@ int __init x3proto_gpio_setup(void) if (unlikely(ret)) goto err_gpio; - for (i = 0; i < NR_BASEBOARD_GPIOS; i++) { - unsigned long flags; - int irq = create_irq(); - - if (unlikely(irq < 0)) { - ret = -EINVAL; - goto err_irq; - } - - spin_lock_irqsave(&x3proto_gpio_lock, flags); - x3proto_gpio_irq_map[i] = irq; - irq_set_chip_and_handler_name(irq, &dummy_irq_chip, - handle_simple_irq, "gpio"); - spin_unlock_irqrestore(&x3proto_gpio_lock, flags); - } + x3proto_irq_domain = irq_domain_add_linear(NULL, NR_BASEBOARD_GPIOS, + &x3proto_gpio_irq_ops, NULL); + if (unlikely(!x3proto_irq_domain)) + goto err_irq; pr_info("registering '%s' support, handling GPIOs %u -> %u, " "bound to IRQ %u\n", @@ -119,10 +128,6 @@ int __init x3proto_gpio_setup(void) return 0; err_irq: - for (; i >= 0; --i) - if (x3proto_gpio_irq_map[i]) - destroy_irq(x3proto_gpio_irq_map[i]); - ret = gpiochip_remove(&x3proto_gpio_chip); if (unlikely(ret)) pr_err("Failed deregistering GPIO\n"); -- cgit v0.10.2 From 5df38b9b7676e4e46c5c13e75f023ffb82542980 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Thu, 24 May 2012 18:24:32 +0900 Subject: sh: se722: Move FPGA IRQs to irqdomain and generic irq chip. This implements a total rewrite of the rather buggy SE7722 FPGA IRQ code, utilizing a linear irq domain as well as the generic irq chip type. While the interaction between the two APIs is a bit clunky (ie, revmap lookup for gc irq_base), they work well enough together that it's easy enough to work with going forward. While we're at it, deal with irq_mask_ack/unmask of the chained IRQ in the demux handler to prevent smc91x screaming about spurious interrupts. There's also some more improvement that can be made to the irqdomain code to create backing irqdescs for the entire linear range in one bang instead of iterating over the number of hwirqs and doing it irq-at-a-time. This is easily dealt with at a later point, though. Signed-off-by: Paul Mundt diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index f2024a91..525b9e3 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig @@ -44,6 +44,8 @@ config SH_7721_SOLUTION_ENGINE config SH_7722_SOLUTION_ENGINE bool "SolutionEngine7722" select SOLUTION_ENGINE + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN depends on CPU_SUBTYPE_SH7722 help Select 7722 SolutionEngine if configuring for a Hitachi SH772 diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c index aac92f2..f5e2af1 100644 --- a/arch/sh/boards/mach-se/7722/irq.c +++ b/arch/sh/boards/mach-se/7722/irq.c @@ -1,79 +1,96 @@ /* - * linux/arch/sh/boards/se/7722/irq.c + * Hitachi UL SolutionEngine 7722 FPGA IRQ Support. * * Copyright (C) 2007 Nobuhiro Iwamatsu - * - * Hitachi UL SolutionEngine 7722 Support. + * Copyright (C) 2012 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ +#define DRV_NAME "SE7722-FPGA" +#define pr_fmt(fmt) DRV_NAME ": " fmt + +#define irq_reg_readl ioread16 +#define irq_reg_writel iowrite16 + #include #include #include -#include -#include +#include +#include +#include +#include #include -unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, }; +#define IRQ01_BASE_ADDR 0x11800000 +#define IRQ01_MODE_REG 0 +#define IRQ01_STS_REG 4 +#define IRQ01_MASK_REG 8 -static void disable_se7722_irq(struct irq_data *data) -{ - unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data); - __raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK); -} +static void __iomem *se7722_irq_regs; +struct irq_domain *se7722_irq_domain; -static void enable_se7722_irq(struct irq_data *data) +static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc) { - unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data); - __raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK); -} + struct irq_data *data = irq_get_irq_data(irq); + struct irq_chip *chip = irq_data_get_irq_chip(data); + unsigned long mask; + int bit; -static struct irq_chip se7722_irq_chip __read_mostly = { - .name = "SE7722-FPGA", - .irq_mask = disable_se7722_irq, - .irq_unmask = enable_se7722_irq, -}; + chip->irq_mask_ack(data); -static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc) + mask = ioread16(se7722_irq_regs + IRQ01_STS_REG); + + for_each_set_bit(bit, &mask, SE7722_FPGA_IRQ_NR) + generic_handle_irq(irq_linear_revmap(se7722_irq_domain, bit)); + + chip->irq_unmask(data); +} + +static void __init se7722_domain_init(void) { - unsigned short intv = __raw_readw(IRQ01_STS); - unsigned int ext_irq = 0; + int i; - intv &= (1 << SE7722_FPGA_IRQ_NR) - 1; + se7722_irq_domain = irq_domain_add_linear(NULL, SE7722_FPGA_IRQ_NR, + &irq_domain_simple_ops, NULL); + if (unlikely(!se7722_irq_domain)) { + printk("Failed to get IRQ domain\n"); + return; + } - for (; intv; intv >>= 1, ext_irq++) { - if (!(intv & 1)) - continue; + for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) { + int irq = irq_create_mapping(se7722_irq_domain, i); - generic_handle_irq(se7722_fpga_irq[ext_irq]); + if (unlikely(irq == 0)) { + printk("Failed to allocate IRQ %d\n", i); + return; + } } } -/* - * Initialize IRQ setting - */ -void __init init_se7722_IRQ(void) +static void __init se7722_gc_init(void) { - int i, irq; + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + unsigned int irq_base; - __raw_writew(0, IRQ01_MASK); /* disable all irqs */ - __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */ + irq_base = irq_linear_revmap(se7722_irq_domain, 0); - for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) { - irq = create_irq(); - if (irq < 0) - return; - se7722_fpga_irq[i] = irq; + gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7722_irq_regs, + handle_level_irq); + if (unlikely(!gc)) + return; - irq_set_chip_and_handler_name(se7722_fpga_irq[i], - &se7722_irq_chip, - handle_level_irq, - "level"); + ct = gc->chip_types; + ct->chip.irq_mask = irq_gc_mask_set_bit; + ct->chip.irq_unmask = irq_gc_mask_clr_bit; - irq_set_chip_data(se7722_fpga_irq[i], (void *)i); - } + ct->regs.mask = IRQ01_MASK_REG; + + irq_setup_generic_chip(gc, IRQ_MSK(SE7722_FPGA_IRQ_NR), + IRQ_GC_INIT_MASK_CACHE, + IRQ_NOREQUEST | IRQ_NOPROBE, 0); irq_set_chained_handler(IRQ0_IRQ, se7722_irq_demux); irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); @@ -81,3 +98,25 @@ void __init init_se7722_IRQ(void) irq_set_chained_handler(IRQ1_IRQ, se7722_irq_demux); irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW); } + +/* + * Initialize FPGA IRQs + */ +void __init init_se7722_IRQ(void) +{ + se7722_irq_regs = ioremap(IRQ01_BASE_ADDR, SZ_16); + if (unlikely(!se7722_irq_regs)) { + printk("Failed to remap IRQ01 regs\n"); + return; + } + + /* + * All FPGA IRQs disabled by default + */ + iowrite16(0, se7722_irq_regs + IRQ01_MASK_REG); + + __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */ + + se7722_domain_init(); + se7722_gc_init(); +} diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c index e1963fe..2ec0111 100644 --- a/arch/sh/boards/mach-se/7722/setup.c +++ b/arch/sh/boards/mach-se/7722/setup.c @@ -2,6 +2,7 @@ * linux/arch/sh/boards/se/7722/setup.c * * Copyright (C) 2007 Nobuhiro Iwamatsu + * Copyright (C) 2012 Paul Mundt * * Hitachi UL SolutionEngine 7722 Support. * @@ -15,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -142,10 +144,10 @@ static int __init se7722_devices_setup(void) /* Wire-up dynamic vectors */ cf_ide_resources[2].start = cf_ide_resources[2].end = - se7722_fpga_irq[SE7722_FPGA_IRQ_MRSHPC0]; + irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_MRSHPC0); smc91x_eth_resources[1].start = smc91x_eth_resources[1].end = - se7722_fpga_irq[SE7722_FPGA_IRQ_SMC]; + irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_SMC); return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices)); } diff --git a/arch/sh/include/mach-se/mach/se7722.h b/arch/sh/include/mach-se/mach/se7722.h index 16505bf..5508dc4 100644 --- a/arch/sh/include/mach-se/mach/se7722.h +++ b/arch/sh/include/mach-se/mach/se7722.h @@ -80,12 +80,6 @@ #define IRQ0_IRQ 32 #define IRQ1_IRQ 33 -#define IRQ01_MODE 0xb1800000 -#define IRQ01_STS 0xb1800004 -#define IRQ01_MASK 0xb1800008 - -/* Bits in IRQ01_* registers */ - #define SE7722_FPGA_IRQ_USB 0 /* IRQ0 */ #define SE7722_FPGA_IRQ_SMC 1 /* IRQ0 */ #define SE7722_FPGA_IRQ_MRSHPC0 2 /* IRQ1 */ @@ -94,8 +88,10 @@ #define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */ #define SE7722_FPGA_IRQ_NR 6 +struct irq_domain; + /* arch/sh/boards/se/7722/irq.c */ -extern unsigned int se7722_fpga_irq[]; +extern struct irq_domain *se7722_irq_domain; void init_se7722_IRQ(void); -- cgit v0.10.2 From 197b58e6651426bec8b2582013258b52cd15a444 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Thu, 24 May 2012 19:07:18 +0900 Subject: sh: se7343: Move CPLD IRQs to irqdomain and generic irq chip. Follows the se7722 change, see there for more information. Signed-off-by: Paul Mundt diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index 525b9e3..1a28004 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig @@ -81,6 +81,8 @@ config SH_7780_SOLUTION_ENGINE config SH_7343_SOLUTION_ENGINE bool "SolutionEngine7343" select SOLUTION_ENGINE + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN depends on CPU_SUBTYPE_SH7343 help Select 7343 SolutionEngine if configuring for a Hitachi diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c index fd45ffc..7646bf0 100644 --- a/arch/sh/boards/mach-se/7343/irq.c +++ b/arch/sh/boards/mach-se/7343/irq.c @@ -1,86 +1,129 @@ /* - * linux/arch/sh/boards/se/7343/irq.c + * Hitachi UL SolutionEngine 7343 FPGA IRQ Support. * * Copyright (C) 2008 Yoshihiro Shimoda + * Copyright (C) 2012 Paul Mundt * - * Based on linux/arch/sh/boards/se/7722/irq.c + * Based on linux/arch/sh/boards/se/7343/irq.c * Copyright (C) 2007 Nobuhiro Iwamatsu * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ +#define DRV_NAME "SE7343-FPGA" +#define pr_fmt(fmt) DRV_NAME ": " fmt + +#define irq_reg_readl ioread16 +#define irq_reg_writel iowrite16 + #include #include #include +#include #include +#include #include -unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, }; +#define PA_CPLD_BASE_ADDR 0x11400000 +#define PA_CPLD_ST_REG 0x08 /* CPLD Interrupt status register */ +#define PA_CPLD_IMSK_REG 0x0a /* CPLD Interrupt mask register */ -static void disable_se7343_irq(struct irq_data *data) -{ - unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data); - __raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK); -} +static void __iomem *se7343_irq_regs; +struct irq_domain *se7343_irq_domain; -static void enable_se7343_irq(struct irq_data *data) +static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc) { - unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data); - __raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK); -} + struct irq_data *data = irq_get_irq_data(irq); + struct irq_chip *chip = irq_data_get_irq_chip(data); + unsigned long mask; + int bit; -static struct irq_chip se7343_irq_chip __read_mostly = { - .name = "SE7343-FPGA", - .irq_mask = disable_se7343_irq, - .irq_unmask = enable_se7343_irq, -}; + chip->irq_mask_ack(data); -static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc) + mask = ioread16(se7343_irq_regs + PA_CPLD_ST_REG); + + for_each_set_bit(bit, &mask, SE7343_FPGA_IRQ_NR) + generic_handle_irq(irq_linear_revmap(se7343_irq_domain, bit)); + + chip->irq_unmask(data); +} + +static void __init se7343_domain_init(void) { - unsigned short intv = __raw_readw(PA_CPLD_ST); - unsigned int ext_irq = 0; + int i; - intv &= (1 << SE7343_FPGA_IRQ_NR) - 1; + se7343_irq_domain = irq_domain_add_linear(NULL, SE7343_FPGA_IRQ_NR, + &irq_domain_simple_ops, NULL); + if (unlikely(!se7343_irq_domain)) { + printk("Failed to get IRQ domain\n"); + return; + } - for (; intv; intv >>= 1, ext_irq++) { - if (!(intv & 1)) - continue; + for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) { + int irq = irq_create_mapping(se7343_irq_domain, i); - generic_handle_irq(se7343_fpga_irq[ext_irq]); + if (unlikely(irq == 0)) { + printk("Failed to allocate IRQ %d\n", i); + return; + } } } -/* - * Initialize IRQ setting - */ -void __init init_7343se_IRQ(void) +static void __init se7343_gc_init(void) { - int i, irq; + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + unsigned int irq_base; - __raw_writew(0, PA_CPLD_IMSK); /* disable all irqs */ - __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */ + irq_base = irq_linear_revmap(se7343_irq_domain, 0); - for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) { - irq = create_irq(); - if (irq < 0) - return; - se7343_fpga_irq[i] = irq; + gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7343_irq_regs, + handle_level_irq); + if (unlikely(!gc)) + return; - irq_set_chip_and_handler_name(se7343_fpga_irq[i], - &se7343_irq_chip, - handle_level_irq, - "level"); + ct = gc->chip_types; + ct->chip.irq_mask = irq_gc_mask_set_bit; + ct->chip.irq_unmask = irq_gc_mask_clr_bit; - irq_set_chip_data(se7343_fpga_irq[i], (void *)i); - } + ct->regs.mask = PA_CPLD_IMSK_REG; + + irq_setup_generic_chip(gc, IRQ_MSK(SE7343_FPGA_IRQ_NR), + IRQ_GC_INIT_MASK_CACHE, + IRQ_NOREQUEST | IRQ_NOPROBE, 0); irq_set_chained_handler(IRQ0_IRQ, se7343_irq_demux); irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); + irq_set_chained_handler(IRQ1_IRQ, se7343_irq_demux); irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW); + irq_set_chained_handler(IRQ4_IRQ, se7343_irq_demux); irq_set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW); + irq_set_chained_handler(IRQ5_IRQ, se7343_irq_demux); irq_set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW); } + +/* + * Initialize IRQ setting + */ +void __init init_7343se_IRQ(void) +{ + se7343_irq_regs = ioremap(PA_CPLD_BASE_ADDR, SZ_16); + if (unlikely(!se7343_irq_regs)) { + pr_err("Failed to remap CPLD\n"); + return; + } + + /* + * All FPGA IRQs disabled by default + */ + iowrite16(0, se7343_irq_regs + PA_CPLD_IMSK_REG); + + __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */ + + se7343_domain_init(); + se7343_gc_init(); +} diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c index d2370af..8ce4f2a 100644 --- a/arch/sh/boards/mach-se/7343/setup.c +++ b/arch/sh/boards/mach-se/7343/setup.c @@ -5,6 +5,7 @@ #include #include #include +#include #include #include #include @@ -145,11 +146,12 @@ static struct platform_device *sh7343se_platform_devices[] __initdata = { static int __init sh7343se_devices_setup(void) { /* Wire-up dynamic vectors */ - serial_platform_data[0].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTA]; - serial_platform_data[1].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTB]; - + serial_platform_data[0].irq = irq_find_mapping(se7343_irq_domain, + SE7343_FPGA_IRQ_UARTA); + serial_platform_data[1].irq = irq_find_mapping(se7343_irq_domain, + SE7343_FPGA_IRQ_UARTB); usb_resources[2].start = usb_resources[2].end = - se7343_fpga_irq[SE7343_FPGA_IRQ_USB]; + irq_find_mapping(se7343_irq_domain, SE7343_FPGA_IRQ_USB); return platform_add_devices(sh7343se_platform_devices, ARRAY_SIZE(sh7343se_platform_devices)); diff --git a/arch/sh/include/mach-se/mach/se7343.h b/arch/sh/include/mach-se/mach/se7343.h index 8d8170d..2ec6f75 100644 --- a/arch/sh/include/mach-se/mach/se7343.h +++ b/arch/sh/include/mach-se/mach/se7343.h @@ -49,9 +49,6 @@ #define PA_LED 0xb0C00000 /* LED */ #define LED_SHIFT 0 #define PA_DIPSW 0xb0900000 /* Dip switch 31 */ -#define PA_CPLD_MODESET 0xb1400004 /* CPLD Mode set register */ -#define PA_CPLD_ST 0xb1400008 /* CPLD Interrupt status register */ -#define PA_CPLD_IMSK 0xb140000a /* CPLD Interrupt mask register */ /* Area 5 */ #define PA_EXT5 0x14000000 #define PA_EXT5_SIZE 0x04000000 @@ -134,8 +131,10 @@ #define SE7343_FPGA_IRQ_NR 12 +struct irq_domain; + /* arch/sh/boards/se/7343/irq.c */ -extern unsigned int se7343_fpga_irq[]; +extern struct irq_domain *se7343_irq_domain; void init_7343se_IRQ(void); -- cgit v0.10.2 From be9c00295b34760ea2f9667929049f094116b5a8 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Thu, 24 May 2012 19:10:45 +0900 Subject: sh: intc: Kill off deprecated dynamic IRQ API. Now that all of the users have been converted away, kill off the remnants of the old API. Signed-off-by: Paul Mundt diff --git a/drivers/sh/intc/Makefile b/drivers/sh/intc/Makefile index bb5df86..44f006d 100644 --- a/drivers/sh/intc/Makefile +++ b/drivers/sh/intc/Makefile @@ -1,4 +1,4 @@ -obj-y := access.o chip.o core.o dynamic.o handle.o virq.o +obj-y := access.o chip.o core.o handle.o virq.o obj-$(CONFIG_INTC_BALANCING) += balancing.o obj-$(CONFIG_INTC_USERIMASK) += userimask.o diff --git a/drivers/sh/intc/dynamic.c b/drivers/sh/intc/dynamic.c deleted file mode 100644 index 5fea1ee..0000000 --- a/drivers/sh/intc/dynamic.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Dynamic IRQ management - * - * Copyright (C) 2010 Paul Mundt - * - * Modelled after arch/x86/kernel/apic/io_apic.c - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#define pr_fmt(fmt) "intc: " fmt - -#include -#include -#include -#include -#include "internals.h" /* only for activate_irq() damage.. */ - -/* - * The IRQ bitmap provides a global map of bound IRQ vectors for a - * given platform. Allocation of IRQs are either static through the CPU - * vector map, or dynamic in the case of board mux vectors or MSI. - * - * As this is a central point for all IRQ controllers on the system, - * each of the available sources are mapped out here. This combined with - * sparseirq makes it quite trivial to keep the vector map tightly packed - * when dynamically creating IRQs, as well as tying in to otherwise - * unused irq_desc positions in the sparse array. - */ - -/* - * Dynamic IRQ allocation and deallocation - */ -unsigned int create_irq_nr(unsigned int irq_want, int node) -{ - int irq = irq_alloc_desc_at(irq_want, node); - if (irq < 0) - return 0; - - activate_irq(irq); - return irq; -} - -int create_irq(void) -{ - int irq = irq_alloc_desc(numa_node_id()); - if (irq >= 0) - activate_irq(irq); - - return irq; -} - -void destroy_irq(unsigned int irq) -{ - irq_free_desc(irq); -} - -void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs) -{ - int i; - - for (i = 0; i < nr_vecs; i++) - irq_reserve_irq(evt2irq(vectors[i].vect)); -} -- cgit v0.10.2 From 123df01e8e046d6065089e1bff29aa3fc48d4420 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Thu, 24 May 2012 19:24:18 +0900 Subject: sh: intc: Allocate subgroup virq backing desc directly. This switches to using irq_alloc_desc() directly for subgroup IRQs. We still need to call activate_irq() on these in order to make them requestable, at least up until these get moved in to their own irq domain.. Signed-off-by: Paul Mundt diff --git a/drivers/sh/intc/virq.c b/drivers/sh/intc/virq.c index 93cec21..f30ac93 100644 --- a/drivers/sh/intc/virq.c +++ b/drivers/sh/intc/virq.c @@ -219,12 +219,14 @@ restart: if (radix_tree_deref_retry(entry)) goto restart; - irq = create_irq(); + irq = irq_alloc_desc(numa_node_id()); if (unlikely(irq < 0)) { pr_err("no more free IRQs, bailing..\n"); break; } + activate_irq(irq); + pr_info("Setting up a chained VIRQ from %d -> %d\n", irq, entry->pirq); -- cgit v0.10.2