/*
 * B4860 Silicon/SoC Device Tree Source (pre include)
 *
 * Copyright 2012 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of Freescale Semiconductor nor the
 *       names of its contributors may be used to endorse or promote products
 *       derived from this software without specific prior written permission.
 *
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation, either version 2 of that License or (at your option) any
 * later version.
 *
 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/dts-v1/;

/include/ "e6500_power_isa.dtsi"

/ {
	compatible = "fsl,B4860";
	#address-cells = <2>;
	#size-cells = <2>;
	interrupt-parent = <&mpic>;

	aliases {
		ccsr = &soc;
		dcsr = &dcsr;

		serial0 = &serial0;
		serial1 = &serial1;
		serial2 = &serial2;
		serial3 = &serial3;

		crypto = &crypto;
		qman = &qman;
		bman = &bman;
		fman0 = &fman0;
		ethernet0 = &fm1mac1;
		ethernet1 = &fm1mac2;
		ethernet2 = &fm1mac3;
		ethernet3 = &fm1mac4;
		ethernet4 = &fm1mac5;
		ethernet5 = &fm1mac6;
		ethernet8 = &fm1mac9;
		ethernet9 = &fm1mac10;

		pci0 = &pci0;
		usb0 = &usb0;
		dma0 = &dma0;
		dma1 = &dma1;
		sdhc = &sdhc;
	};

/include/ "b4860si-chosen.dtsi"

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		/*
		 * Temporarily add next-level-cache info in each cpu node so
		 * that uboot can do L2 cache fixup. This can be removed once
		 * u-boot can create cpu node with cache info.
		 */
		cpu0: PowerPC,e6500@0 {
			device_type = "cpu";
			reg = <0 1>;
			clocks = <&mux0>;
			next-level-cache = <&L2>;
		};
		cpu1: PowerPC,e6500@2 {
			device_type = "cpu";
			reg = <2 3>;
			clocks = <&mux0>;
			next-level-cache = <&L2>;
		};
		cpu2: PowerPC,e6500@4 {
			device_type = "cpu";
			reg = <4 5>;
			clocks = <&mux0>;
			next-level-cache = <&L2>;
		};
		cpu3: PowerPC,e6500@6 {
			device_type = "cpu";
			reg = <6 7>;
			clocks = <&mux0>;
			next-level-cache = <&L2>;
		};
	};

	dsp-clusters {
		#address-cells = <1>;
		#size-cells = <0>;

		dsp-cluster0 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,sc3900-cluster";
			reg = <0>;

			dsp0: dsp@0 {
				compatible = "fsl,sc3900";
				reg = <0>;
				next-level-cache = <&L2_2>;
			};
			dsp1: dsp@1 {
				compatible = "fsl,sc3900";
				reg = <1>;
				next-level-cache = <&L2_2>;
			};
		};

		dsp-cluster1 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,sc3900-cluster";
			reg = <1>;

			dsp2: dsp@2 {
				compatible = "fsl,sc3900";
				reg = <2>;
				next-level-cache = <&L2_3>;
			};
			dsp3: dsp@3 {
				compatible = "fsl,sc3900";
				reg = <3>;
				next-level-cache = <&L2_3>;
			};
		};

		dsp-cluster2 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,sc3900-cluster";
			reg = <2>;

			dsp4: dsp@4 {
				compatible = "fsl,sc3900";
				reg = <4>;
				next-level-cache = <&L2_4>;
			};
			dsp5: dsp@5 {
				compatible = "fsl,sc3900";
				reg = <5>;
				next-level-cache = <&L2_4>;
			};
		};
	};
};