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author | Stefan Roese <sr@denx.de> | 2007-08-15 19:06:27 (GMT) |
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committer | Stefan Roese <sr@denx.de> | 2007-08-15 19:06:27 (GMT) |
commit | b706d63559aeec352bc72dd86d7d5423c15f6a60 (patch) | |
tree | fdeda4d61970fef239d9d66ecd851fa46cfe5ec0 /board/netstal/hcu4/README.txt | |
parent | c8603cfbd4573379a6076c9c208545ba2bbf019a (diff) | |
parent | 594e79838ce5078a90d0c27abb2b2d61d5f8e8a7 (diff) | |
download | u-boot-b706d63559aeec352bc72dd86d7d5423c15f6a60.tar.xz |
Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'board/netstal/hcu4/README.txt')
-rw-r--r-- | board/netstal/hcu4/README.txt | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/board/netstal/hcu4/README.txt b/board/netstal/hcu4/README.txt new file mode 100644 index 0000000..1e9c64a --- /dev/null +++ b/board/netstal/hcu4/README.txt @@ -0,0 +1,59 @@ +HCU4 Configuration Details + +Memory Bank 0 -- Flash chip +--------------------------- + +0xfff00000 - 0xffffffff + +The flash chip is really only 512Kbytes, but the high address bit of +the 1Meg region is ignored, so the flash is replicated through the +region. Thus, this is consistent with a flash base address 0xfff80000. + +The placement at the end is to be consistent with reset behavior, +where the processor itself initially uses this bus to load the branch +vector and start running. + +On-Chip Memory +-------------- + +0xf4000000 - 0xf4000fff + +The 405GPr includes a 4K on-chip memory that can be placed however +software chooses. I choose to place the memory at this address, to +keep it out of the cachable areas. + + +Internal Peripherals +-------------------- + +0xef600300 - 0xef6008ff + +These are scattered various peripherals internal to the PPC405GPr +chip. + +Chip-Select 2: Flash Memory +--------------------------- + +0x70000000 + +Chip-Select 3: CAN Interface +---------------------------- +0x7800000 + + +Chip-Select 4: IMC-bus standard +------------------------------- + +Our IO-Bus (slow version) + + +Chip-Select 5: IMC-bus fast (inactive) +-------------------------------------- + +Our IO-Bus (fast, but not yet use) + + +Memory Bank 1 -- SDRAM +------------------------------------- + +0x00000000 - 0x1ffffff # Default 32 MB |