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authorAlexey Brodkin <abrodkin@synopsys.com>2015-02-03 10:58:13 (GMT)
committerAlexey Brodkin <abrodkin@synopsys.com>2015-02-09 13:41:20 (GMT)
commit205e7a7b77726abeff57576e2ecf2c6d4dc07ccf (patch)
tree5f3bae0b6a43d741cb1aabf10f541b6ec38b921e /include/configs/axs101.h
parent5ff40f3d4226d45c78f3bb9db276f6685b24a89a (diff)
downloadu-boot-205e7a7b77726abeff57576e2ecf2c6d4dc07ccf.tar.xz
arc: select cache settings via menuconfig
This change allows to keep board description clean and minimalistic. This is especially helpful if one board may house different CPUs with different features. It is applicable to both FPGA-based boards or those that have CPUs mounted on interchnagable daughter-boards. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Diffstat (limited to 'include/configs/axs101.h')
-rw-r--r--include/configs/axs101.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/include/configs/axs101.h b/include/configs/axs101.h
index b94687c..ff3fad3 100644
--- a/include/configs/axs101.h
+++ b/include/configs/axs101.h
@@ -10,12 +10,8 @@
/*
* CPU configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
-/* NAND controller DMA doesn't work correctly with D$ enabled */
-#define CONFIG_SYS_DCACHE_OFF
-
/*
* Board configuration
*/