diff options
author | Stephen Warren <swarren@nvidia.com> | 2012-05-24 11:38:39 (GMT) |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-07-07 12:07:21 (GMT) |
commit | f9f2f12e2cace3685ea0dbb6b6d78789fb75f043 (patch) | |
tree | fc78d2768741b6f81c7d57fb734f36b95f230fcd /include/configs | |
parent | e87c2bda9c45bcfcc8239f6052d6fa9aec7351d6 (diff) | |
download | u-boot-f9f2f12e2cace3685ea0dbb6b6d78789fb75f043.tar.xz |
tegra: seaboard: disable SPI, move environment to eMMC
The SPI hardware on Seaboard is too broken to use; it is muxed with the
console UART and requires evil interactions between the SPI and UART
drivers to work even partially. The current code in U-Boot is not
sufficient to make this work correctly; auto boot is aborted due to
corruption in the UART RX channel interrupting it.
Instead, move the environment to eMMC, at the end of the second boot
sector. This should not conflict with any other eMMC usage, irrespective
of whether the board boots from SPI, NAND, or eMMC: if U-Boot is stored
in eMMC, it will be stored well below this location. The kernel only
uses the general area of the eMMC once booted, not the boot sectors.
Boards that are derivatives of Seaboard don't have the muxing issue,
and should/could have a separate U-Boot configuration file that does
enable SPI if desired.
Alternatively, the environment could be stored in NAND flash, but we
currently have no driver for that controller.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/seaboard.h | 29 |
1 files changed, 4 insertions, 25 deletions
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index cae6e23..537ab0e 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -51,30 +51,12 @@ /* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */ #define CONFIG_UART_DISABLE_GPIO GPIO_PI3 -/* - * On Seaboard, SPIFLASH is muxed with UART4. The next 5 defines are - * needed to work around that design error. - */ -#define CONFIG_SPI_UART_SWITCH -#define CONFIG_SPI_CORRUPTS_UART NV_PA_APB_UARTD_BASE -#define CONFIG_SPI_CORRUPTS_UART_NR 3 -#define CONFIG_SPI_CORRUPTS_UART_DLY 2500 -#undef CONFIG_CMDLINE_EDITING /* avoid NUL in input buffer */ #define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD #define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 /* lp1, 1GB */ #define CONFIG_BOARD_EARLY_INIT_F -/* SPI */ -#define CONFIG_TEGRA_SPI -#define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_WINBOND -#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 -#define CONFIG_CMD_SPI -#define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - /* I2C */ #define CONFIG_TEGRA_I2C #define CONFIG_SYS_I2C_INIT_BOARD @@ -94,13 +76,10 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT -/* Environment in SPI */ -#define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_ENV_SPI_MAX_HZ 48000000 -#define CONFIG_ENV_SPI_MODE SPI_MODE_0 - -#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE -#define CONFIG_ENV_OFFSET (CONFIG_SPI_FLASH_SIZE - CONFIG_ENV_SECT_SIZE) +/* Environment in eMMC, at the end of 2nd "boot sector" */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_ENV_OFFSET ((2 * 512 * 1024) - CONFIG_ENV_SIZE) +#define CONFIG_SYS_MMC_ENV_DEV 0 /* USB Host support */ #define CONFIG_USB_EHCI |