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author | vijay rai <vijay.rai@freescale.com> | 2014-04-15 06:04:12 (GMT) |
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committer | York Sun <yorksun@freescale.com> | 2014-04-23 00:58:52 (GMT) |
commit | 0c12a1592c49c4fccea1df3eac9bf769aa1bd503 (patch) | |
tree | c598d47adacfb706974232736d5ccf68c36fc789 /include/fsl_usb.h | |
parent | b0615f0bd22abc575824a0e20d1192913b77e282 (diff) | |
download | u-boot-0c12a1592c49c4fccea1df3eac9bf769aa1bd503.tar.xz |
powerpc/85xx: Enhance get_sys_info() to check clocking mode
T1040 and it's variants provide "Single Oscillator Source" Reference Clock Mode.
In this mode, single onboard oscillator(DIFF_SYSCLK) can provide the reference clock
(100MHz) to the following PLLs:
• Platform PLL
• Core PLLs
• USB PLL
• DDR PLL, etc
The cfg_eng_use0 of porsr1 register identifies whether the SYSCLK (single-ended) or
DIFF_SYSCLK (differential) is selected as the clock input to the chip.
get_sys_info has been enhanced to add the diff_sysclk so that the
various drivers can be made aware of ths diff sysclk configuration and
act accordingly.
Other changes:
-single_src to ddr_refclk_sel, as it is use for checking ddr reference clock
-Removed the print of single_src from get_sys_info as this will be
-printed whenever somebody calls get_sys_info which is not appropriate.
-Add print of single_src in checkcpu as it is called only once during initialization
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/fsl_usb.h')
0 files changed, 0 insertions, 0 deletions