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author | Xu Ziyuan <xzy.xu@rock-chips.com> | 2016-07-14 06:52:32 (GMT) |
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committer | Simon Glass <sjg@chromium.org> | 2016-07-26 02:44:19 (GMT) |
commit | fab3357916096d4c61a5e2fe5d28f5aeb78c6957 (patch) | |
tree | d078c85aed34d3bd8365c5b93ccac806c9493d6b /include/usb/dwc2_udc.h | |
parent | ad8fe6b96432d17aca224167338c68dc2f0cf2ae (diff) | |
download | u-boot-fab3357916096d4c61a5e2fe5d28f5aeb78c6957.tar.xz |
usb: rockchip-phy: implement USB2.0 phy control
So far, Rockchip SoCs have two kinds of USB2.0 phy, such as Synopsys and
Innosilicon. This patch applys dwc2 usb driver framework to implement
phy_init() and phy_off() methods for Synopsys phy on Rockchip platform.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/usb/dwc2_udc.h')
-rw-r--r-- | include/usb/dwc2_udc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h index 302e9a3..3ce43f8 100644 --- a/include/usb/dwc2_udc.h +++ b/include/usb/dwc2_udc.h @@ -12,6 +12,8 @@ #define PHY0_SLEEP (1 << 5) struct dwc2_plat_otg_data { + void *priv; + int phy_of_node; int (*phy_control)(int on); unsigned int regs_phy; unsigned int regs_otg; |