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-rw-r--r--arch/x86/dts/bayleybay.dts86
-rw-r--r--arch/x86/dts/chromebook_link.dts42
-rw-r--r--arch/x86/dts/chromebox_panther.dts44
-rw-r--r--arch/x86/dts/crownbay.dts30
-rw-r--r--arch/x86/dts/galileo.dts28
-rw-r--r--arch/x86/dts/minnowmax.dts86
6 files changed, 163 insertions, 153 deletions
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index cdd5121..4ea9262 100644
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -65,48 +65,6 @@
};
};
- gpioa {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0 0x20>;
- bank-name = "A";
- };
-
- gpiob {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x20 0x20>;
- bank-name = "B";
- };
-
- gpioc {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x40 0x20>;
- bank-name = "C";
- };
-
- gpiod {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x60 0x20>;
- bank-name = "D";
- };
-
- gpioe {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x80 0x20>;
- bank-name = "E";
- };
-
- gpiof {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0xA0 0x20>;
- bank-name = "F";
- };
-
pci {
compatible = "pci-x86";
#address-cells = <3>;
@@ -119,6 +77,8 @@
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch9";
+ #address-cells = <1>;
+ #size-cells = <1>;
irq-router {
compatible = "intel,irq-router";
@@ -201,6 +161,48 @@
};
};
};
+
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x20>;
+ bank-name = "A";
+ };
+
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x20 0x20>;
+ bank-name = "B";
+ };
+
+ gpioc {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x40 0x20>;
+ bank-name = "C";
+ };
+
+ gpiod {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x60 0x20>;
+ bank-name = "D";
+ };
+
+ gpioe {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x80 0x20>;
+ bank-name = "E";
+ };
+
+ gpiof {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0xA0 0x20>;
+ bank-name = "F";
+ };
};
};
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index e5d77b6..f85e55c 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -54,27 +54,6 @@
};
- gpioa {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0 0x10>;
- bank-name = "A";
- };
-
- gpiob {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x30 0x10>;
- bank-name = "B";
- };
-
- gpioc {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x40 0x10>;
- bank-name = "C";
- };
-
chosen {
stdout-path = "/serial";
};
@@ -270,6 +249,27 @@
};
};
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x10>;
+ bank-name = "A";
+ };
+
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x30 0x10>;
+ bank-name = "B";
+ };
+
+ gpioc {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x40 0x10>;
+ bank-name = "C";
+ };
+
lpc {
compatible = "intel,bd82x6x-lpc";
#address-cells = <1>;
diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts
index ce8825f..480b366 100644
--- a/arch/x86/dts/chromebox_panther.dts
+++ b/arch/x86/dts/chromebox_panther.dts
@@ -18,27 +18,6 @@
no-keyboard;
};
- gpioa {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0 0x10>;
- bank-name = "A";
- };
-
- gpiob {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x30 0x10>;
- bank-name = "B";
- };
-
- gpioc {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x40 0x10>;
- bank-name = "C";
- };
-
chosen {
stdout-path = "/serial";
};
@@ -55,6 +34,8 @@
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch9";
+ #address-cells = <1>;
+ #size-cells = <1>;
spi: spi {
#address-cells = <1>;
@@ -73,6 +54,27 @@
};
};
};
+
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x10>;
+ bank-name = "A";
+ };
+
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x30 0x10>;
+ bank-name = "B";
+ };
+
+ gpioc {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x40 0x10>;
+ bank-name = "C";
+ };
};
};
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index ee8302c..337513b 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -46,20 +46,6 @@
};
- gpioa {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0 0x20>;
- bank-name = "A";
- };
-
- gpiob {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x20 0x20>;
- bank-name = "B";
- };
-
chosen {
/*
* By default the legacy superio serial port is used as the
@@ -162,6 +148,8 @@
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch7";
+ #address-cells = <1>;
+ #size-cells = <1>;
irq-router {
compatible = "intel,queensbay-irq-router";
@@ -238,6 +226,20 @@
memory-map = <0xffe00000 0x00200000>;
};
};
+
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x20>;
+ bank-name = "A";
+ };
+
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x20 0x20>;
+ bank-name = "B";
+ };
};
};
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index a9b2994..21c3641 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -82,6 +82,8 @@
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch7";
+ #address-cells = <1>;
+ #size-cells = <1>;
irq-router {
compatible = "intel,quark-irq-router";
@@ -132,21 +134,21 @@
};
};
};
- };
- };
- gpioa {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0 0x20>;
- bank-name = "A";
- };
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x20>;
+ bank-name = "A";
+ };
- gpiob {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x20 0x20>;
- bank-name = "B";
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x20 0x20>;
+ bank-name = "B";
+ };
+ };
};
};
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 5b4da6c..b7e3ba4 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -75,48 +75,6 @@
};
};
- gpioa {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0 0x20>;
- bank-name = "A";
- };
-
- gpiob {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x20 0x20>;
- bank-name = "B";
- };
-
- gpioc {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x40 0x20>;
- bank-name = "C";
- };
-
- gpiod {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x60 0x20>;
- bank-name = "D";
- };
-
- gpioe {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x80 0x20>;
- bank-name = "E";
- };
-
- gpiof {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0xA0 0x20>;
- bank-name = "F";
- };
-
chosen {
stdout-path = "/serial";
};
@@ -153,6 +111,8 @@
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "pci8086,0f1c", "intel,pch9";
+ #address-cells = <1>;
+ #size-cells = <1>;
irq-router {
compatible = "intel,irq-router";
@@ -235,6 +195,48 @@
};
};
};
+
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x20>;
+ bank-name = "A";
+ };
+
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x20 0x20>;
+ bank-name = "B";
+ };
+
+ gpioc {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x40 0x20>;
+ bank-name = "C";
+ };
+
+ gpiod {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x60 0x20>;
+ bank-name = "D";
+ };
+
+ gpioe {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x80 0x20>;
+ bank-name = "E";
+ };
+
+ gpiof {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0xA0 0x20>;
+ bank-name = "F";
+ };
};
};
generated by cgit v0.10.2 at 2024-09-06 03:12:24 (GMT)