From aaa717ebdec1859c263ba0a25afab255e8ab6038 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 2 Dec 2014 16:52:18 +0900 Subject: arm: rmobile: rcar: Move module control register to header file of SoC Module control registers of R-Car ARM SoC (r8a7790, r8a7791, r8a7793 and r8a7794) are same address. This moves these to header file of SoC. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu diff --git a/arch/arm/include/asm/arch-rmobile/rcar-base.h b/arch/arm/include/asm/arch-rmobile/rcar-base.h index dbbebcf..23c4bba 100644 --- a/arch/arm/include/asm/arch-rmobile/rcar-base.h +++ b/arch/arm/include/asm/arch-rmobile/rcar-base.h @@ -29,6 +29,45 @@ #define SCIF4_BASE 0xE6EE0000 #define SCIF5_BASE 0xE6EE8000 +/* Module stop status register */ +#define MSTPSR0 0xE6150030 +#define MSTPSR1 0xE6150038 +#define MSTPSR2 0xE6150040 +#define MSTPSR3 0xE6150048 +#define MSTPSR4 0xE615004C +#define MSTPSR5 0xE615003C +#define MSTPSR7 0xE61501C4 +#define MSTPSR8 0xE61509A0 +#define MSTPSR9 0xE61509A4 +#define MSTPSR10 0xE61509A8 +#define MSTPSR11 0xE61509AC + +/* Realtime module stop control register */ +#define RMSTPCR0 0xE6150110 +#define RMSTPCR1 0xE6150114 +#define RMSTPCR2 0xE6150118 +#define RMSTPCR3 0xE615011C +#define RMSTPCR4 0xE6150120 +#define RMSTPCR5 0xE6150124 +#define RMSTPCR7 0xE615012C +#define RMSTPCR8 0xE6150980 +#define RMSTPCR9 0xE6150984 +#define RMSTPCR10 0xE6150988 +#define RMSTPCR11 0xE615098C + +/* System module stop control register */ +#define SMSTPCR0 0xE6150130 +#define SMSTPCR1 0xE6150134 +#define SMSTPCR2 0xE6150138 +#define SMSTPCR3 0xE615013C +#define SMSTPCR4 0xE6150140 +#define SMSTPCR5 0xE6150144 +#define SMSTPCR7 0xE615014C +#define SMSTPCR8 0xE6150990 +#define SMSTPCR9 0xE6150994 +#define SMSTPCR10 0xE6150998 +#define SMSTPCR11 0xE615099C + /* * SH-I2C * Ch2 and ch3 are different address. These are defined diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c index 523c5f1..bf90f2e 100644 --- a/board/renesas/alt/alt.c +++ b/board/renesas/alt/alt.c @@ -37,20 +37,9 @@ void s_init(void) qos_init(); } -#define MSTPSR1 0xE6150038 -#define SMSTPCR1 0xE6150134 #define TMU0_MSTP125 (1 << 25) - -#define MSTPSR7 0xE61501C4 -#define SMSTPCR7 0xE615014C #define SCIF2_MSTP719 (1 << 19) - -#define MSTPSR8 0xE61509A0 -#define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13) - -#define MSTPSR3 0xE6150048 -#define SMSTPCR3 0xE615013C #define IIC1_MSTP323 (1 << 23) #define mstp_setbits(type, addr, saddr, set) \ diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c index 715fba0..bb6849e 100644 --- a/board/renesas/gose/gose.c +++ b/board/renesas/gose/gose.c @@ -41,16 +41,8 @@ void s_init(void) qos_init(); } -#define MSTPSR1 0xE6150038 -#define SMSTPCR1 0xE6150134 #define TMU0_MSTP125 (1 << 25) - -#define MSTPSR7 0xE61501C4 -#define SMSTPCR7 0xE615014C #define SCIF0_MSTP721 (1 << 21) - -#define MSTPSR8 0xE61509A0 -#define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13) #define mstp_setbits(type, addr, saddr, set) \ diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index 244bc58..14d1770 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -43,16 +43,8 @@ void s_init(void) qos_init(); } -#define MSTPSR1 0xE6150038 -#define SMSTPCR1 0xE6150134 #define TMU0_MSTP125 (1 << 25) - -#define MSTPSR7 0xE61501C4 -#define SMSTPCR7 0xE615014C #define SCIF0_MSTP721 (1 << 21) - -#define MSTPSR8 0xE61509A0 -#define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13) #define mstp_setbits(type, addr, saddr, set) \ diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 93273b2..23ef194 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -50,16 +50,8 @@ void s_init(void) qos_init(); } -#define MSTPSR1 0xE6150038 -#define SMSTPCR1 0xE6150134 #define TMU0_MSTP125 (1 << 25) - -#define MSTPSR7 0xE61501C4 -#define SMSTPCR7 0xE615014C #define SCIF0_MSTP721 (1 << 21) - -#define MSTPSR8 0xE61509A0 -#define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13) #define mstp_setbits(type, addr, saddr, set) \ -- cgit v0.10.2 From 44e1eebf86efc917010b8fd482951b10c3b06453 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 2 Dec 2014 16:52:19 +0900 Subject: arm: rmobile: rcar: Move control macro of mstp to arch-rmobile/rcar-mstp.h Control macro of mstp is common in R-Car ARM SoC (r8a7790, r8a7791, r8a7793 and r8a7794). This moves these to arch-rmobile/rcar-mstp.h Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu diff --git a/arch/arm/include/asm/arch-rmobile/rcar-mstp.h b/arch/arm/include/asm/arch-rmobile/rcar-mstp.h new file mode 100644 index 0000000..bf9a2cf --- /dev/null +++ b/arch/arm/include/asm/arch-rmobile/rcar-mstp.h @@ -0,0 +1,22 @@ +/* + * arch/arm/include/asm/arch-rmobile/rcar-mstp.h + * + * Copyright (C) 2013, 2014 Nobuhiro Iwamatsu + * Copyright (C) 2013, 2014 Renesas Electronics Corporation + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef __ASM_ARCH_RCAR_MSTP_H +#define __ASM_ARCH_RCAR_MSTP_H + +#define mstp_setbits(type, addr, saddr, set) \ + out_##type((saddr), in_##type(addr) | (set)) +#define mstp_clrbits(type, addr, saddr, clear) \ + out_##type((saddr), in_##type(addr) & ~(clear)) +#define mstp_setbits_le32(addr, saddr, set) \ + mstp_setbits(le32, addr, saddr, set) +#define mstp_clrbits_le32(addr, saddr, clear) \ + mstp_clrbits(le32, addr, saddr, clear) + +#endif /* __ASM_ARCH_RCAR_MSTP_H */ diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c index bf90f2e..e3cfe54 100644 --- a/board/renesas/alt/alt.c +++ b/board/renesas/alt/alt.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -42,15 +43,6 @@ void s_init(void) #define ETHER_MSTP813 (1 << 13) #define IIC1_MSTP323 (1 << 23) -#define mstp_setbits(type, addr, saddr, set) \ - out_##type((saddr), in_##type(addr) | (set)) -#define mstp_clrbits(type, addr, saddr, clear) \ - out_##type((saddr), in_##type(addr) & ~(clear)) -#define mstp_setbits_le32(addr, saddr, set) \ - mstp_setbits(le32, addr, saddr, set) -#define mstp_clrbits_le32(addr, saddr, clear) \ - mstp_clrbits(le32, addr, saddr, clear) - int board_early_init_f(void) { /* TMU */ diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c index bb6849e..0b2d904 100644 --- a/board/renesas/gose/gose.c +++ b/board/renesas/gose/gose.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -45,15 +46,6 @@ void s_init(void) #define SCIF0_MSTP721 (1 << 21) #define ETHER_MSTP813 (1 << 13) -#define mstp_setbits(type, addr, saddr, set) \ - out_##type((saddr), in_##type(addr) | (set)) -#define mstp_clrbits(type, addr, saddr, clear) \ - out_##type((saddr), in_##type(addr) & ~(clear)) -#define mstp_setbits_le32(addr, saddr, set) \ - mstp_setbits(le32, addr, saddr, set) -#define mstp_clrbits_le32(addr, saddr, clear) \ - mstp_clrbits(le32, addr, saddr, clear) - int board_early_init_f(void) { /* TMU0 */ diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index 14d1770..5ebbfcf 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -47,15 +48,6 @@ void s_init(void) #define SCIF0_MSTP721 (1 << 21) #define ETHER_MSTP813 (1 << 13) -#define mstp_setbits(type, addr, saddr, set) \ - out_##type((saddr), in_##type(addr) | (set)) -#define mstp_clrbits(type, addr, saddr, clear) \ - out_##type((saddr), in_##type(addr) & ~(clear)) -#define mstp_setbits_le32(addr, saddr, set) \ - mstp_setbits(le32, addr, saddr, set) -#define mstp_clrbits_le32(addr, saddr, clear) \ - mstp_clrbits(le32, addr, saddr, clear) - int board_early_init_f(void) { mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 23ef194..47cf51b 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include "qos.h" @@ -54,15 +55,6 @@ void s_init(void) #define SCIF0_MSTP721 (1 << 21) #define ETHER_MSTP813 (1 << 13) -#define mstp_setbits(type, addr, saddr, set) \ - out_##type((saddr), in_##type(addr) | (set)) -#define mstp_clrbits(type, addr, saddr, clear) \ - out_##type((saddr), in_##type(addr) & ~(clear)) -#define mstp_setbits_le32(addr, saddr, set) \ - mstp_setbits(le32, addr, saddr, set) -#define mstp_clrbits_le32(addr, saddr, clear) \ - mstp_clrbits(le32, addr, saddr, clear) - int board_early_init_f(void) { /* TMU0 */ -- cgit v0.10.2 From 72fd3838c6cc861e5061d99316c35eed62a3fb85 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 2 Dec 2014 16:52:20 +0900 Subject: arm: rmobile: rcar: Move arch_preboot_os function to rcar-gen2-common/common.c The arch_preboot_os function used in boards using R-Car ARM SoC (r8a7790, r8a7791, r8a7793 and r8a7794) is common. This makes rcar-gen2-common/common.c file providing common function for R-Car ARM SoC, and moves this function to this file. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu diff --git a/board/renesas/alt/Makefile b/board/renesas/alt/Makefile index 9ed12bd..6904e39 100644 --- a/board/renesas/alt/Makefile +++ b/board/renesas/alt/Makefile @@ -6,4 +6,4 @@ # SPDX-License-Identifier: GPL-2.0 # -obj-y := alt.o qos.o +obj-y := alt.o qos.o ../rcar-gen2-common/common.o diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c index e3cfe54..c794d43 100644 --- a/board/renesas/alt/alt.c +++ b/board/renesas/alt/alt.c @@ -60,12 +60,6 @@ int board_early_init_f(void) return 0; } -void arch_preboot_os(void) -{ - /* Disable TMU0 */ - mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); -} - int board_init(void) { /* adress of boot parameters */ diff --git a/board/renesas/gose/Makefile b/board/renesas/gose/Makefile index a4fb6cc..2dac748 100644 --- a/board/renesas/gose/Makefile +++ b/board/renesas/gose/Makefile @@ -6,4 +6,4 @@ # SPDX-License-Identifier: GPL-2.0 # -obj-y := gose.o qos.o +obj-y := gose.o qos.o ../rcar-gen2-common/common.o diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c index 0b2d904..677b976 100644 --- a/board/renesas/gose/gose.c +++ b/board/renesas/gose/gose.c @@ -60,16 +60,6 @@ int board_early_init_f(void) return 0; } -#define TSTR0 0x04 -#define TSTR0_STR0 0x01 -void arch_preboot_os(void) -{ - /* stop TMU0 */ - mstp_clrbits_le32(TMU_BASE + TSTR0, TMU_BASE + TSTR0, TSTR0_STR0); - /* Disable TMU0 */ - mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); -} - #define PUPR5 0xE6060114 #define PUPR5_ETH 0x3FFC0000 #define PUPR5_ETH_MAGIC (1 << 27) diff --git a/board/renesas/koelsch/Makefile b/board/renesas/koelsch/Makefile index b4d0183..c10bba5 100644 --- a/board/renesas/koelsch/Makefile +++ b/board/renesas/koelsch/Makefile @@ -6,4 +6,4 @@ # SPDX-License-Identifier: GPL-2.0 # -obj-y := koelsch.o qos.o +obj-y := koelsch.o qos.o ../rcar-gen2-common/common.o diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index 5ebbfcf..10fa571 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -61,12 +61,6 @@ int board_early_init_f(void) return 0; } -void arch_preboot_os(void) -{ - /* Disable TMU0 */ - mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); -} - /* LSI pin pull-up control */ #define PUPR5 0xe6060114 #define PUPR5_ETH 0x3FFC0000 diff --git a/board/renesas/lager/Makefile b/board/renesas/lager/Makefile index 034c6f8..8d03461 100644 --- a/board/renesas/lager/Makefile +++ b/board/renesas/lager/Makefile @@ -6,4 +6,4 @@ # SPDX-License-Identifier: GPL-2.0 # -obj-y := lager.o qos.o +obj-y := lager.o qos.o ../rcar-gen2-common/common.o diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 47cf51b..4afb1ac 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -67,12 +67,6 @@ int board_early_init_f(void) return 0; } -void arch_preboot_os(void) -{ - /* Disable TMU0 */ - mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); -} - DECLARE_GLOBAL_DATA_PTR; int board_init(void) { diff --git a/board/renesas/rcar-gen2-common/common.c b/board/renesas/rcar-gen2-common/common.c new file mode 100644 index 0000000..23010ee --- /dev/null +++ b/board/renesas/rcar-gen2-common/common.c @@ -0,0 +1,27 @@ +/* + * board/renesas/rcar-gen2-common/common.c + * + * Copyright (C) 2013 Renesas Electronics Corporation + * Copyright (C) 2013 Nobuhiro Iwamatsu + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include +#include +#include +#include +#include + +#define TSTR0 0x04 +#define TSTR0_STR0 0x01 + +#define TMU0_MSTP125 (1 << 25) +void arch_preboot_os(void) +{ + /* stop TMU0 */ + mstp_clrbits_le32(TMU_BASE + TSTR0, TMU_BASE + TSTR0, TSTR0_STR0); + + /* Disable TMU0 */ + mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); +} -- cgit v0.10.2 From 11d902c6a6769dc5db41de534310377efe5179a9 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 2 Dec 2014 16:52:21 +0900 Subject: arm: rmobile: rcar: Add mstp_setclrbits and mstp_setclrbits_le32 This addes macro for set and clear bit control for module control register. This is used when user want to disable the function of the devices corresponding to register. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu diff --git a/arch/arm/include/asm/arch-rmobile/rcar-mstp.h b/arch/arm/include/asm/arch-rmobile/rcar-mstp.h index bf9a2cf..c3df11f 100644 --- a/arch/arm/include/asm/arch-rmobile/rcar-mstp.h +++ b/arch/arm/include/asm/arch-rmobile/rcar-mstp.h @@ -14,9 +14,13 @@ out_##type((saddr), in_##type(addr) | (set)) #define mstp_clrbits(type, addr, saddr, clear) \ out_##type((saddr), in_##type(addr) & ~(clear)) +#define mstp_setclrbits(type, addr, set, clear) \ + out_##type((addr), (in_##type(addr) | (set)) & ~(clear)) #define mstp_setbits_le32(addr, saddr, set) \ mstp_setbits(le32, addr, saddr, set) #define mstp_clrbits_le32(addr, saddr, clear) \ mstp_clrbits(le32, addr, saddr, clear) +#define mstp_setclrbits_le32(addr, set, clear) \ + mstp_setclrbits(le32, addr, set, clear) #endif /* __ASM_ARCH_RCAR_MSTP_H */ -- cgit v0.10.2 From c72dd8eab1d02082ce63d47ab67449a78a1d46f7 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 2 Dec 2014 16:52:22 +0900 Subject: arm: rmobile: rcar: Add infomation of bits for module control register This adds infomation of bits for module control register. This is used to control modules on ARM R-Car SoCs. Signed-off-by: Hisashi Nakamura Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu diff --git a/arch/arm/include/asm/arch-rmobile/r8a7790.h b/arch/arm/include/asm/arch-rmobile/r8a7790.h index de14869..132d58c 100644 --- a/arch/arm/include/asm/arch-rmobile/r8a7790.h +++ b/arch/arm/include/asm/arch-rmobile/r8a7790.h @@ -15,6 +15,19 @@ #define CONFIG_SYS_I2C_SH_BASE2 0xE6520000 #define CONFIG_SYS_I2C_SH_BASE3 0xE60B0000 +/* Module stop control/status register bits */ +#define MSTP0_BITS 0x00640801 +#define MSTP1_BITS 0xDB6E9BDF +#define MSTP2_BITS 0x300DA1FC +#define MSTP3_BITS 0xF08CF831 +#define MSTP4_BITS 0x80000184 +#define MSTP5_BITS 0x44C00046 +#define MSTP7_BITS 0x07F30718 +#define MSTP8_BITS 0x01F0FF84 +#define MSTP9_BITS 0xF5979FCF +#define MSTP10_BITS 0xFFFEFFE0 +#define MSTP11_BITS 0x00000000 + #define R8A7790_CUT_ES2X 2 #define IS_R8A7790_ES2() \ (rmobile_get_cpu_rev_integer() == R8A7790_CUT_ES2X) diff --git a/arch/arm/include/asm/arch-rmobile/r8a7791.h b/arch/arm/include/asm/arch-rmobile/r8a7791.h index 26a0bd5..d2cbcd7 100644 --- a/arch/arm/include/asm/arch-rmobile/r8a7791.h +++ b/arch/arm/include/asm/arch-rmobile/r8a7791.h @@ -51,6 +51,19 @@ #define DBSC3_1_QOS_W15_BASE 0xE67A2F00 #define DBSC3_1_DBADJ2 0xE67A00C8 +/* Module stop control/status register bits */ +#define MSTP0_BITS 0x00640801 +#define MSTP1_BITS 0x9B6C9B5A +#define MSTP2_BITS 0x100D21FC +#define MSTP3_BITS 0xF08CD810 +#define MSTP4_BITS 0x800001C4 +#define MSTP5_BITS 0x44C00046 +#define MSTP7_BITS 0x05BFE618 +#define MSTP8_BITS 0x40C0FE85 +#define MSTP9_BITS 0xFF979FFF +#define MSTP10_BITS 0xFFFEFFE0 +#define MSTP11_BITS 0x000001C0 + #define R8A7791_CUT_ES2X 2 #define IS_R8A7791_ES2() \ (rmobile_get_cpu_rev_integer() == R8A7791_CUT_ES2X) diff --git a/arch/arm/include/asm/arch-rmobile/r8a7793.h b/arch/arm/include/asm/arch-rmobile/r8a7793.h index 778812e..1abdeb7 100644 --- a/arch/arm/include/asm/arch-rmobile/r8a7793.h +++ b/arch/arm/include/asm/arch-rmobile/r8a7793.h @@ -56,6 +56,20 @@ /* * R8A7793 I/O Product Information */ + +/* Module stop control/status register bits */ +#define MSTP0_BITS 0x00640801 +#define MSTP1_BITS 0x9B6C9B5A +#define MSTP2_BITS 0x100D21FC +#define MSTP3_BITS 0xF08CD810 +#define MSTP4_BITS 0x800001C4 +#define MSTP5_BITS 0x44C00046 +#define MSTP7_BITS 0x05BFE618 +#define MSTP8_BITS 0x40C0FE85 +#define MSTP9_BITS 0xFF979FFF +#define MSTP10_BITS 0xFFFEFFE0 +#define MSTP11_BITS 0x000001C0 + #define R8A7793_CUT_ES2X 2 #define IS_R8A7793_ES2() \ (rmobile_get_cpu_rev_integer() == R8A7793_CUT_ES2X) diff --git a/arch/arm/include/asm/arch-rmobile/r8a7794.h b/arch/arm/include/asm/arch-rmobile/r8a7794.h index 66d5a29..d7c9004 100644 --- a/arch/arm/include/asm/arch-rmobile/r8a7794.h +++ b/arch/arm/include/asm/arch-rmobile/r8a7794.h @@ -14,4 +14,17 @@ /* SH-I2C */ #define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000 +/* Module stop control/status register bits */ +#define MSTP0_BITS 0x00440801 +#define MSTP1_BITS 0x936899DA +#define MSTP2_BITS 0x100D21FC +#define MSTP3_BITS 0xE084D810 +#define MSTP4_BITS 0x800001C4 +#define MSTP5_BITS 0x40C00044 +#define MSTP7_BITS 0x013FE618 +#define MSTP8_BITS 0x40803C05 +#define MSTP9_BITS 0xFB879FEE +#define MSTP10_BITS 0xFFFEFFE0 +#define MSTP11_BITS 0x000001C0 + #endif /* __ASM_ARCH_R8A7794_H */ -- cgit v0.10.2 From d3a22419cf8c36a0365318e8ea0907161e9edcc4 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 2 Dec 2014 16:52:23 +0900 Subject: arm: rmobile: rcar: Add structure for infomation of module control register The infomation of module control register for R-Car ARM SoC (r8a7790, r8a7791, r8a7793 and r8a7794) are almost the same, they can be combined into one structure. This provides structure that summarizes infomation of module control register and default register values. And this structure is the module control use of the kernel at boot time. Signed-off-by: Hisashi Nakamura Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu diff --git a/arch/arm/include/asm/arch-rmobile/rcar-mstp.h b/arch/arm/include/asm/arch-rmobile/rcar-mstp.h index c3df11f..9a564f8 100644 --- a/arch/arm/include/asm/arch-rmobile/rcar-mstp.h +++ b/arch/arm/include/asm/arch-rmobile/rcar-mstp.h @@ -23,4 +23,87 @@ #define mstp_setclrbits_le32(addr, set, clear) \ mstp_setclrbits(le32, addr, set, clear) +#ifndef CONFIG_SMSTP0_ENA +#define CONFIG_SMSTP0_ENA 0x00 +#endif +#ifndef CONFIG_SMSTP1_ENA +#define CONFIG_SMSTP1_ENA 0x00 +#endif +#ifndef CONFIG_SMSTP2_ENA +#define CONFIG_SMSTP2_ENA 0x00 +#endif +#ifndef CONFIG_SMSTP3_ENA +#define CONFIG_SMSTP3_ENA 0x00 +#endif +#ifndef CONFIG_SMSTP4_ENA +#define CONFIG_SMSTP4_ENA 0x00 +#endif +#ifndef CONFIG_SMSTP5_ENA +#define CONFIG_SMSTP5_ENA 0x00 +#endif +#ifndef CONFIG_SMSTP6_ENA +#define CONFIG_SMSTP6_ENA 0x00 +#endif +#ifndef CONFIG_SMSTP7_ENA +#define CONFIG_SMSTP7_ENA 0x00 +#endif +#ifndef CONFIG_SMSTP8_ENA +#define CONFIG_SMSTP8_ENA 0x00 +#endif +#ifndef CONFIG_SMSTP9_ENA +#define CONFIG_SMSTP9_ENA 0x00 +#endif +#ifndef CONFIG_SMSTP10_ENA +#define CONFIG_SMSTP10_ENA 0x00 +#endif +#ifndef CONFIG_SMSTP11_ENA +#define CONFIG_SMSTP11_ENA 0x00 +#endif + +#ifndef CONFIG_RMSTP0_ENA +#define CONFIG_RMSTP0_ENA 0x00 +#endif +#ifndef CONFIG_RMSTP1_ENA +#define CONFIG_RMSTP1_ENA 0x00 +#endif +#ifndef CONFIG_RMSTP2_ENA +#define CONFIG_RMSTP2_ENA 0x00 +#endif +#ifndef CONFIG_RMSTP3_ENA +#define CONFIG_RMSTP3_ENA 0x00 +#endif +#ifndef CONFIG_RMSTP4_ENA +#define CONFIG_RMSTP4_ENA 0x00 +#endif +#ifndef CONFIG_RMSTP5_ENA +#define CONFIG_RMSTP5_ENA 0x00 +#endif +#ifndef CONFIG_RMSTP6_ENA +#define CONFIG_RMSTP6_ENA 0x00 +#endif +#ifndef CONFIG_RMSTP7_ENA +#define CONFIG_RMSTP7_ENA 0x00 +#endif +#ifndef CONFIG_RMSTP8_ENA +#define CONFIG_RMSTP8_ENA 0x00 +#endif +#ifndef CONFIG_RMSTP9_ENA +#define CONFIG_RMSTP9_ENA 0x00 +#endif +#ifndef CONFIG_RMSTP10_ENA +#define CONFIG_RMSTP10_ENA 0x00 +#endif +#ifndef CONFIG_RMSTP11_ENA +#define CONFIG_RMSTP11_ENA 0x00 +#endif + +struct mstp_ctl { + u32 s_addr; + u32 s_dis; + u32 s_ena; + u32 r_addr; + u32 r_dis; + u32 r_ena; +}; + #endif /* __ASM_ARCH_RCAR_MSTP_H */ -- cgit v0.10.2 From 8e2e58863a5bf10fee36709646692c072eafe555 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 2 Dec 2014 16:52:24 +0900 Subject: arm: rmobile: rcar: Stop clock prior to booting kernel This stops clock except INTC-RT, MSIF, INTC-SYS, IRQC and SCIF before kernel boots. Signed-off-by: Hisashi Nakamura Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu diff --git a/board/renesas/rcar-gen2-common/common.c b/board/renesas/rcar-gen2-common/common.c index 23010ee..0103f42 100644 --- a/board/renesas/rcar-gen2-common/common.c +++ b/board/renesas/rcar-gen2-common/common.c @@ -16,12 +16,44 @@ #define TSTR0 0x04 #define TSTR0_STR0 0x01 -#define TMU0_MSTP125 (1 << 25) +static struct mstp_ctl mstptbl[] = { + { SMSTPCR0, MSTP0_BITS, CONFIG_SMSTP0_ENA, + RMSTPCR0, MSTP0_BITS, CONFIG_RMSTP0_ENA }, + { SMSTPCR1, MSTP1_BITS, CONFIG_SMSTP1_ENA, + RMSTPCR1, MSTP1_BITS, CONFIG_RMSTP1_ENA }, + { SMSTPCR2, MSTP2_BITS, CONFIG_SMSTP2_ENA, + RMSTPCR2, MSTP2_BITS, CONFIG_RMSTP2_ENA }, + { SMSTPCR3, MSTP3_BITS, CONFIG_SMSTP3_ENA, + RMSTPCR3, MSTP3_BITS, CONFIG_RMSTP3_ENA }, + { SMSTPCR4, MSTP4_BITS, CONFIG_SMSTP4_ENA, + RMSTPCR4, MSTP4_BITS, CONFIG_RMSTP4_ENA }, + { SMSTPCR5, MSTP5_BITS, CONFIG_SMSTP5_ENA, + RMSTPCR5, MSTP5_BITS, CONFIG_RMSTP5_ENA }, + /* No MSTP6 */ + { SMSTPCR7, MSTP7_BITS, CONFIG_SMSTP7_ENA, + RMSTPCR7, MSTP7_BITS, CONFIG_RMSTP7_ENA }, + { SMSTPCR8, MSTP8_BITS, CONFIG_SMSTP8_ENA, + RMSTPCR8, MSTP8_BITS, CONFIG_RMSTP8_ENA }, + { SMSTPCR9, MSTP9_BITS, CONFIG_SMSTP9_ENA, + RMSTPCR9, MSTP9_BITS, CONFIG_RMSTP9_ENA }, + { SMSTPCR10, MSTP10_BITS, CONFIG_SMSTP10_ENA, + RMSTPCR10, MSTP10_BITS, CONFIG_RMSTP10_ENA }, + { SMSTPCR11, MSTP11_BITS, CONFIG_SMSTP1_ENA, + RMSTPCR11, MSTP11_BITS, CONFIG_RMSTP11_ENA }, +}; + void arch_preboot_os(void) { + int i; + /* stop TMU0 */ mstp_clrbits_le32(TMU_BASE + TSTR0, TMU_BASE + TSTR0, TSTR0_STR0); - /* Disable TMU0 */ - mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); + /* Stop module clock */ + for (i = 0; i < ARRAY_SIZE(mstptbl); i++) { + mstp_setclrbits_le32(mstptbl[i].s_addr, mstptbl[i].s_dis, + mstptbl[i].s_ena); + mstp_setclrbits_le32(mstptbl[i].r_addr, mstptbl[i].r_dis, + mstptbl[i].r_ena); + } } diff --git a/include/configs/alt.h b/include/configs/alt.h index 5c8223c..d116920 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -95,4 +95,14 @@ #define CONFIG_USB_EHCI_RMOBILE #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +/* Module stop status bits */ +/* INTC-RT */ +#define CONFIG_SMSTP0_ENA 0x00400000 +/* MSIF */ +#define CONFIG_SMSTP2_ENA 0x00002000 +/* INTC-SYS, IRQC */ +#define CONFIG_SMSTP4_ENA 0x00000180 +/* SCIF2 */ +#define CONFIG_SMSTP7_ENA 0x00080000 + #endif /* __ALT_H */ diff --git a/include/configs/gose.h b/include/configs/gose.h index c347e45..44c8a30 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -91,4 +91,14 @@ #define CONFIG_USB_EHCI_RMOBILE #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +/* Module stop status bits */ +/* INTC-RT */ +#define CONFIG_SMSTP0_ENA 0x00400000 +/* MSIF */ +#define CONFIG_SMSTP2_ENA 0x00002000 +/* INTC-SYS, IRQC */ +#define CONFIG_SMSTP4_ENA 0x00000180 +/* SCIF0 */ +#define CONFIG_SMSTP7_ENA 0x00200000 + #endif /* __GOSE_H */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index bb98302..c14889c 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -92,4 +92,15 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_USB_STORAGE + +/* Module stop status bits */ +/* INTC-RT */ +#define CONFIG_SMSTP0_ENA 0x00400000 +/* MSIF*/ +#define CONFIG_SMSTP2_ENA 0x00002000 +/* INTC-SYS, IRQC */ +#define CONFIG_SMSTP4_ENA 0x00000180 +/* SCIF0 */ +#define CONFIG_SMSTP7_ENA 0x00200000 + #endif /* __KOELSCH_H */ diff --git a/include/configs/lager.h b/include/configs/lager.h index 37be38f..9c89b16 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -93,4 +93,14 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_STORAGE +/* Module stop status bits */ +/* INTC-RT */ +#define CONFIG_SMSTP0_ENA 0x00400000 +/* MSIF */ +#define CONFIG_SMSTP2_ENA 0x00002000 +/* INTC-SYS, IRQC */ +#define CONFIG_SMSTP4_ENA 0x00000180 +/* SCIF0 */ +#define CONFIG_SMSTP7_ENA 0x00200000 + #endif /* __LAGER_H */ -- cgit v0.10.2 From 3183c2a0cbdd11989112faa13a1582f797ade51f Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 10 Dec 2014 14:12:43 +0900 Subject: arm: rmobile: Add mmc.h for sh_mmcif of rmobile R-Mobile and R-Car ARM SoCs use sh_mmcif as MMC host driver. This adds arch-rmobile/mmc.h that defines mmcif_mmc_init(). Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu diff --git a/arch/arm/include/asm/arch-rmobile/mmc.h b/arch/arm/include/asm/arch-rmobile/mmc.h new file mode 100644 index 0000000..4e0fef1 --- /dev/null +++ b/arch/arm/include/asm/arch-rmobile/mmc.h @@ -0,0 +1,14 @@ +/* + * Renesas SuperH MMCIF driver. + * + * Copyright (C) 2014 Nobuhiro Iwamatsu + * Copyright (C) 2014 Renesas Electronics Corporation + * + * SPDX-License-Identifier: GPL-2.0 + */ +#ifndef _RMOBILE_MMC_H_ +#define _RMOBILE_MMC_H_ + +int mmcif_mmc_init(void); + +#endif /* _RMOBILE_MMC_H_ */ -- cgit v0.10.2 From 9427c610cd9cabaa6ccdb59f8effdce5272b8917 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 10 Dec 2014 10:46:04 +0900 Subject: arm: rmobile: rcar: Add support ext2 and ext4 file system Board with R-Car SoC has USB and MMC. They might use the EXT2 or EXT4 file system. This adds support ext2 and ext4 file system Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 46c7526..c33f1cb 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -28,6 +28,9 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_SF #define CONFIG_CMD_SPI +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_EXT4_WRITE #define CONFIG_SYS_THUMB_BUILD #define CONFIG_SYS_GENERIC_BOARD @@ -36,6 +39,7 @@ #define CONFIG_FAT_WRITE #define CONFIG_DOS_PARTITION #define CONFIG_SUPPORT_VFAT +#define CONFIG_FS_EXT4 #define CONFIG_EXT4_WRITE #define CONFIG_CMDLINE_TAG -- cgit v0.10.2 From d7916b1d38c20a55ca7248742dd0bdf049deb7e4 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 3 Dec 2014 15:30:30 +0900 Subject: arm: rmobile: lager: Add support MMC and MMC command Lager board has been connected to eMMC of 8GB to MMC1 port. This enables MMC1 port and MMC command. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 4afb1ac..d1e29d2 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -19,8 +19,10 @@ #include #include #include +#include #include #include +#include #include "qos.h" DECLARE_GLOBAL_DATA_PTR; @@ -54,6 +56,7 @@ void s_init(void) #define TMU0_MSTP125 (1 << 25) #define SCIF0_MSTP721 (1 << 21) #define ETHER_MSTP813 (1 << 13) +#define MMC1_MSTP305 (1 << 5) int board_early_init_f(void) { @@ -63,6 +66,8 @@ int board_early_init_f(void) mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721); /* ETHER */ mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHER_MSTP813); + /* eMMC */ + mstp_clrbits_le32(MSTPSR3, SMSTPCR3, MMC1_MSTP305); return 0; } @@ -141,6 +146,28 @@ int board_phy_config(struct phy_device *phydev) return 0; } +int board_mmc_init(bd_t *bis) +{ + int ret = 0; + +#ifdef CONFIG_SH_MMCIF + gpio_request(GPIO_FN_MMC1_D0, NULL); + gpio_request(GPIO_FN_MMC1_D1, NULL); + gpio_request(GPIO_FN_MMC1_D2, NULL); + gpio_request(GPIO_FN_MMC1_D3, NULL); + gpio_request(GPIO_FN_MMC1_D4, NULL); + gpio_request(GPIO_FN_MMC1_D5, NULL); + gpio_request(GPIO_FN_MMC1_D6, NULL); + gpio_request(GPIO_FN_MMC1_D7, NULL); + gpio_request(GPIO_FN_MMC1_CLK, NULL); + gpio_request(GPIO_FN_MMC1_CMD, NULL); + + ret = mmcif_mmc_init(); +#endif + return ret; +} + + int dram_init(void) { gd->ram_size = CONFIG_SYS_SDRAM_SIZE; diff --git a/include/configs/lager.h b/include/configs/lager.h index 9c89b16..291267f 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -93,6 +93,15 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_STORAGE +/* MMC */ +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC + +#define CONFIG_SH_MMCIF +#define CONFIG_SH_MMCIF_ADDR 0xEE220000 +#define CONFIG_SH_MMCIF_CLK 97500000 + /* Module stop status bits */ /* INTC-RT */ #define CONFIG_SMSTP0_ENA 0x00400000 -- cgit v0.10.2 From 2b8c0814f88fa2d6fd8a1ac994e4396b39a0eac8 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 3 Dec 2014 15:30:30 +0900 Subject: arm: rmobile: alt: Add support MMC and MMC command Alt board has been connected to eMMC of 8GB to MMC port. This enables MMC port and MMC command. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c index c794d43..8cc17e9 100644 --- a/board/renesas/alt/alt.c +++ b/board/renesas/alt/alt.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -42,6 +43,7 @@ void s_init(void) #define SCIF2_MSTP719 (1 << 19) #define ETHER_MSTP813 (1 << 13) #define IIC1_MSTP323 (1 << 23) +#define MMC0_MSTP315 (1 << 15) int board_early_init_f(void) { @@ -57,6 +59,10 @@ int board_early_init_f(void) /* IIC1 / sh-i2c ch1 */ mstp_clrbits_le32(MSTPSR3, SMSTPCR3, IIC1_MSTP323); +#ifdef CONFIG_SH_MMCIF + /* MMC */ + mstp_clrbits_le32(MSTPSR3, SMSTPCR3, MMC0_MSTP315); +#endif return 0; } @@ -120,6 +126,19 @@ int board_eth_init(bd_t *bis) #endif } +int board_mmc_init(bd_t *bis) +{ + int ret = 0; + +#ifdef CONFIG_SH_MMCIF + gpio_request(GPIO_GP_4_31, NULL); + gpio_set_value(GPIO_GP_4_31, 1); + + ret = mmcif_mmc_init(); +#endif + return ret; +} + int dram_init(void) { gd->ram_size = CONFIG_SYS_SDRAM_SIZE; diff --git a/include/configs/alt.h b/include/configs/alt.h index d116920..58eac31 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -95,6 +95,15 @@ #define CONFIG_USB_EHCI_RMOBILE #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +/* MMCIF */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_MMC + +#define CONFIG_SH_MMCIF +#define CONFIG_SH_MMCIF_ADDR 0xee200000 +#define CONFIG_SH_MMCIF_CLK 48000000 + /* Module stop status bits */ /* INTC-RT */ #define CONFIG_SMSTP0_ENA 0x00400000 -- cgit v0.10.2