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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2007-11-27 17:59:32 (GMT)
committerHaavard Skinnemoen <hskinnemoen@atmel.com>2007-12-07 13:52:33 (GMT)
commitdf679771ce6a6bf57012459fbd15c981deaee526 (patch)
tree84abd309e78e3b6e8f6a20b759f7c50cd66a660c
parent702f22b306c8357b3ef5012b5a8ce062e1d11b4e (diff)
downloadlinux-fsl-qoriq-df679771ce6a6bf57012459fbd15c981deaee526.tar.xz
[AVR32] Fix invalid status register bit definitions in asm/ptrace.h
The 'H' bit is bit 29, while the 'R' bit doesn't exist. Luckily, we don't actually use any of the bits in question. Also update show_regs() to show the Debug Mask and Debug state bits. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
-rw-r--r--arch/avr32/kernel/process.c5
-rw-r--r--include/asm-avr32/ptrace.h6
2 files changed, 5 insertions, 6 deletions
diff --git a/arch/avr32/kernel/process.c b/arch/avr32/kernel/process.c
index 13f9884..f42a1d5 100644
--- a/arch/avr32/kernel/process.c
+++ b/arch/avr32/kernel/process.c
@@ -287,10 +287,11 @@ void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl)
regs->sr & SR_N ? 'N' : 'n',
regs->sr & SR_Z ? 'Z' : 'z',
regs->sr & SR_C ? 'C' : 'c');
- printk("%sMode bits: %c%c%c%c%c%c%c%c%c\n", log_lvl,
+ printk("%sMode bits: %c%c%c%c%c%c%c%c%c%c\n", log_lvl,
regs->sr & SR_H ? 'H' : 'h',
- regs->sr & SR_R ? 'R' : 'r',
regs->sr & SR_J ? 'J' : 'j',
+ regs->sr & SR_DM ? 'M' : 'm',
+ regs->sr & SR_D ? 'D' : 'd',
regs->sr & SR_EM ? 'E' : 'e',
regs->sr & SR_I3M ? '3' : '.',
regs->sr & SR_I2M ? '2' : '.',
diff --git a/include/asm-avr32/ptrace.h b/include/asm-avr32/ptrace.h
index 60f0f19..8c5dba5 100644
--- a/include/asm-avr32/ptrace.h
+++ b/include/asm-avr32/ptrace.h
@@ -14,8 +14,7 @@
/*
* Status Register bits
*/
-#define SR_H 0x40000000
-#define SR_R 0x20000000
+#define SR_H 0x20000000
#define SR_J 0x10000000
#define SR_DM 0x08000000
#define SR_D 0x04000000
@@ -35,8 +34,7 @@
#define SR_I0M 0x00020000
#define SR_GM 0x00010000
-#define SR_H_BIT 30
-#define SR_R_BIT 29
+#define SR_H_BIT 29
#define SR_J_BIT 28
#define SR_DM_BIT 27
#define SR_D_BIT 26