mmc: sdhci-of-esdhc: add SDR50 mode support for SD/MMC Legacy Adapter Card

The eSDHC is not compatible with SD spec well, so we need
to use eSDHC-specific code to switch to SDR50 mode.
1. IO signal voltage switching, eSDHC uses SDHC_VS to switch
io voltage and it's needed to configure a global utilities
register SCFG_SDHCIOVSELCR(if it has) and SDHC_VS signal.
2. Before executing tuning procedure, eSDHC should set its own
tuning block.
static const struct sdhci_ops sdhci_esdhc_ops = {
	...
	.set_tuning_block = esdhc_set_tuning_block,
	.signal_voltage_switch = esdhc_signal_voltage_switch,
};

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>

3 files changed, 56 insertions, 1 deletions

diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index 06da060..ad952a2 100644
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -972,6 +972,15 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr,
 			goto free_card;
 	}
 
+	/* If the signal voltage was switched to 1.8v,
+	 * it's needed to set 4bit width for card and host.
+	 */
+	if (host->ios.signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
+		if (mmc_app_set_bus_width(card, MMC_BUS_WIDTH_4))
+			goto free_card;
+		mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4);
+	}
+
 	err = mmc_sd_setup_card(host, card, oldcard != NULL);
 	if (err)
 		goto free_card;
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index a4aa096..6a44d76 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -38,6 +38,8 @@
 
 #define ESDHCI_PRESENT_STATE	0x24
 #define ESDHC_CLK_STABLE	0x00000008
+#define ESDHC_DLSL		0x0f000000
+#define ESDHC_CLSL		0x00800000
 
 #define ESDHC_PROCTL		0x28
 #define ESDHC_VOLT_SEL		0x00000400
@@ -84,6 +86,8 @@
 #define ESDHC_HOST_CONTROL_RES	0x01
 #define ESDHC_VOL_SEL		0x04
 
+void esdhc_clock_control(struct sdhci_host *host, bool enable);
+
 static inline void esdhc_set_clock(struct sdhci_host *host, unsigned int clock,
 				   unsigned int host_clock)
 {
@@ -140,7 +144,10 @@ static inline void esdhc_set_clock(struct sdhci_host *host, unsigned int clock,
 	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
 
 	mdelay(1);
+	host->clock = clock;
+	return;
 out:
+	esdhc_clock_control(host, false);
 	host->clock = clock;
 }
 
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index afdf21a..359f3d2 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -39,7 +39,17 @@ static bool peripheral_clk_available;
 static u32 esdhc_readl(struct sdhci_host *host, int reg)
 {
 	u32 ret;
+	u32 clsl;
+	u32 dlsl;
 
+	if (reg == SDHCI_PRESENT_STATE) {
+		ret = sdhci_32bs_readl(host, reg);
+		clsl = ret & ESDHC_CLSL;
+		dlsl = ret & ESDHC_DLSL;
+		ret &= ~((ESDHC_CLSL << 1) | (ESDHC_DLSL >> 4));
+		ret |= ((clsl << 1) | (dlsl >> 4));
+		return ret;
+	}
 	if (reg == SDHCI_CAPABILITIES_1) {
 		ret = sdhci_32bs_readl(host, ESDHC_CAPABILITIES_1);
 		switch (adapter_type) {
@@ -48,6 +58,15 @@ static u32 esdhc_readl(struct sdhci_host *host, int reg)
 				host->mmc->caps2 |= MMC_CAP2_HS200;
 			ret &= ~ESDHC_MODE_MASK;
 			break;
+		case ESDHC_ADAPTER_TYPE_2:
+			if (ret & ESDHC_MODE_MASK) {
+				ret &= ~ESDHC_MODE_MASK;
+				/* If it exists UHS-I support, enable SDR50 */
+				host->mmc->caps |= (MMC_CAP_UHS_SDR50 |
+						    MMC_CAP_UHS_SDR25 |
+						    MMC_CAP_UHS_SDR12);
+			}
+			break;
 		case ESDHC_ADAPTER_TYPE_3:
 			if (ret & ESDHC_MODE_DDR50) {
 				ret &= ESDHC_MODE_DDR50_SEL;
@@ -563,7 +582,7 @@ static int esdhc_pltfm_bus_width(struct sdhci_host *host, int width)
 	return 0;
 }
 
-static void esdhc_clock_control(struct sdhci_host *host, bool enable)
+void esdhc_clock_control(struct sdhci_host *host, bool enable)
 {
 	u32 value;
 	u32 time_out;
@@ -658,9 +677,17 @@ void esdhc_set_tuning_block(struct sdhci_host *host)
 
 }
 
+static const struct of_device_id scfg_device_ids[] = {
+	{ .compatible = "fsl,t1040-scfg", },
+	{}
+};
+
 void esdhc_signal_voltage_switch(struct sdhci_host *host,
 				 unsigned char signal_voltage)
 {
+	struct device_node *scfg_node;
+	void __iomem *scfg_base;
+	u32 scfg_sdhciovselcr;
 	u32 value;
 
 	value = sdhci_32bs_readl(host, ESDHC_PROCTL);
@@ -671,6 +698,18 @@ void esdhc_signal_voltage_switch(struct sdhci_host *host,
 		sdhci_32bs_writel(host, value, ESDHC_PROCTL);
 		break;
 	case MMC_SIGNAL_VOLTAGE_180:
+		scfg_node = of_find_matching_node(NULL, scfg_device_ids);
+		if (scfg_node) {
+			scfg_base = of_iomap(scfg_node, 0);
+			of_node_put(scfg_node);
+			if (scfg_base) {
+				scfg_sdhciovselcr = 0x408;
+				out_be32(scfg_base + scfg_sdhciovselcr,
+						0x80000001);
+				iounmap(scfg_base);
+			}
+		}
+
 		value |= ESDHC_VOLT_SEL;
 		sdhci_32bs_writel(host, value, ESDHC_PROCTL);
 		break;