diff options
author | Zhao Qiang <B45475@freescale.com> | 2014-10-08 07:18:11 (GMT) |
---|---|---|
committer | Matthew Weigel <Matthew.Weigel@freescale.com> | 2014-12-11 18:37:45 (GMT) |
commit | fb0146b5caaf75a80c80f25ca74ab9a7a72e3cf7 (patch) | |
tree | a8ef60dccdade831431e20a10ff6452c0459873e | |
parent | 64a142f0e877d172deb70d25c3a6c3709be50bfb (diff) | |
download | linux-fsl-qoriq-fb0146b5caaf75a80c80f25ca74ab9a7a72e3cf7.tar.xz |
qe: move qe from arch/powerpc/sysdev/ to drivers/soc/
ls1 has qe ip block too, so move qe code from platform directory
to public directory.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
---
patch on upstream can be found with this link:
http://patchwork.ozlabs.org/patch/385724/,
it is under discussion
Change-Id: I39aed531a4792990e3bb8ecc6f4e57f8d9b41bae
Reviewed-on: http://git.am.freescale.net:8181/15818
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
47 files changed, 501 insertions, 376 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 95c2bf0..d20dc2b 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -1028,8 +1028,6 @@ source "drivers/Kconfig" source "fs/Kconfig" -source "arch/powerpc/sysdev/qe_lib/Kconfig" - source "lib/Kconfig" source "arch/powerpc/Kconfig.debug" diff --git a/arch/powerpc/platforms/83xx/km83xx.c b/arch/powerpc/platforms/83xx/km83xx.c index bf4c447..584d8cc 100644 --- a/arch/powerpc/platforms/83xx/km83xx.c +++ b/arch/powerpc/platforms/83xx/km83xx.c @@ -37,8 +37,8 @@ #include <asm/udbg.h> #include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> -#include <asm/qe.h> -#include <asm/qe_ic.h> +#include <linux/fsl/qe.h> +#include <linux/fsl/qe_ic.h> #include "mpc83xx.h" diff --git a/arch/powerpc/platforms/83xx/misc.c b/arch/powerpc/platforms/83xx/misc.c index 125336f..3e2e6d2 100644 --- a/arch/powerpc/platforms/83xx/misc.c +++ b/arch/powerpc/platforms/83xx/misc.c @@ -17,7 +17,7 @@ #include <asm/io.h> #include <asm/hw_irq.h> #include <asm/ipic.h> -#include <asm/qe_ic.h> +#include <linux/fsl/qe_ic.h> #include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c index 8d76220..e1186be 100644 --- a/arch/powerpc/platforms/83xx/mpc832x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c @@ -36,8 +36,8 @@ #include <asm/udbg.h> #include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> -#include <asm/qe.h> -#include <asm/qe_ic.h> +#include <linux/fsl/qe.h> +#include <linux/fsl/qe_ic.h> #include "mpc83xx.h" diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c b/arch/powerpc/platforms/83xx/mpc832x_rdb.c index eff5baa..9f75944 100644 --- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c @@ -25,8 +25,8 @@ #include <asm/time.h> #include <asm/ipic.h> #include <asm/udbg.h> -#include <asm/qe.h> -#include <asm/qe_ic.h> +#include <linux/fsl/qe.h> +#include <linux/fsl/qe_ic.h> #include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c index 1a26d2f..7c1a22f 100644 --- a/arch/powerpc/platforms/83xx/mpc836x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c @@ -44,8 +44,8 @@ #include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> #include <sysdev/simple_gpio.h> -#include <asm/qe.h> -#include <asm/qe_ic.h> +#include <linux/fsl/qe.h> +#include <linux/fsl/qe_ic.h> #include "mpc83xx.h" diff --git a/arch/powerpc/platforms/83xx/mpc836x_rdk.c b/arch/powerpc/platforms/83xx/mpc836x_rdk.c index b63b42d..5e17d71 100644 --- a/arch/powerpc/platforms/83xx/mpc836x_rdk.c +++ b/arch/powerpc/platforms/83xx/mpc836x_rdk.c @@ -20,8 +20,8 @@ #include <asm/time.h> #include <asm/ipic.h> #include <asm/udbg.h> -#include <asm/qe.h> -#include <asm/qe_ic.h> +#include <linux/fsl/qe.h> +#include <linux/fsl/qe_ic.h> #include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> diff --git a/arch/powerpc/platforms/85xx/common.c b/arch/powerpc/platforms/85xx/common.c index 7731c75..7157baa 100644 --- a/arch/powerpc/platforms/85xx/common.c +++ b/arch/powerpc/platforms/85xx/common.c @@ -7,7 +7,7 @@ */ #include <linux/of_platform.h> -#include <asm/qe.h> +#include <linux/fsl/qe.h> #include <sysdev/cpm2_pic.h> #include "mpc85xx.h" diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c index e4a1400..adb65a5 100644 --- a/arch/powerpc/platforms/85xx/corenet_generic.c +++ b/arch/powerpc/platforms/85xx/corenet_generic.c @@ -26,7 +26,7 @@ #include <asm/udbg.h> #include <asm/mpic.h> #include <asm/ehv_pic.h> -#include <asm/qe_ic.h> +#include <linux/fsl/qe_ic.h> #include <linux/of_platform.h> #include <sysdev/fsl_soc.h> diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index c111fba..7171ab0 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c @@ -47,8 +47,8 @@ #include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> #include <sysdev/simple_gpio.h> -#include <asm/qe.h> -#include <asm/qe_ic.h> +#include <linux/fsl/qe.h> +#include <linux/fsl/qe_ic.h> #include <asm/mpic.h> #include <asm/swiotlb.h> #include <asm/fsl_guts.h> diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c index 2746b8b..ccfc8d0 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c @@ -25,8 +25,8 @@ #include <asm/prom.h> #include <asm/udbg.h> #include <asm/mpic.h> -#include <asm/qe.h> -#include <asm/qe_ic.h> +#include <linux/fsl/qe.h> +#include <linux/fsl/qe_ic.h> #include <asm/fsl_guts.h> #include <sysdev/fsl_soc.h> diff --git a/arch/powerpc/platforms/85xx/twr_p102x.c b/arch/powerpc/platforms/85xx/twr_p102x.c index 4e119ac..79dc247 100644 --- a/arch/powerpc/platforms/85xx/twr_p102x.c +++ b/arch/powerpc/platforms/85xx/twr_p102x.c @@ -34,8 +34,8 @@ #include <asm/prom.h> #include <asm/udbg.h> #include <asm/mpic.h> -#include <asm/qe.h> -#include <asm/qe_ic.h> +#include <linux/fsl/qe.h> +#include <linux/fsl/qe_ic.h> #include <asm/fsl_guts.h> #include <sysdev/fsl_soc.h> diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index be181b6..d09ae32f 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig @@ -278,25 +278,6 @@ config TAU_AVERAGE If in doubt, say N here. -config QUICC_ENGINE - bool "Freescale QUICC Engine (QE) Support" - depends on FSL_SOC && (PPC32 || PPC64) - select PPC_LIB_RHEAP - select CRC32 - help - The QUICC Engine (QE) is a new generation of communications - coprocessors on Freescale embedded CPUs (akin to CPM in older chips). - Selecting this option means that you wish to build a kernel - for a machine with a QE coprocessor. - -config QE_GPIO - bool "QE GPIO support" - depends on QUICC_ENGINE - select ARCH_REQUIRE_GPIOLIB - help - Say Y here if you're going to use hardware that connects to the - QE GPIOs. - config CPM2 bool "Enable support for the CPM2 (Communications Processor Module)" depends on (FSL_SOC_BOOKE && PPC32) || 8260 diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index ca258c5..d6bab98 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -28,7 +28,6 @@ obj-$(CONFIG_FSL_85XX_CACHE_SRAM) += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o obj-$(CONFIG_SIMPLE_GPIO) += simple_gpio.o obj-$(CONFIG_FSL_RIO) += fsl_rio.o fsl_rmu.o obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o -obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ mv64x60-$(CONFIG_PCI) += mv64x60_pci.o obj-$(CONFIG_MV64X60) += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o \ mv64x60_udbg.o diff --git a/arch/powerpc/sysdev/qe_lib/Kconfig b/arch/powerpc/sysdev/qe_lib/Kconfig deleted file mode 100644 index 644b7dbf..0000000 --- a/arch/powerpc/sysdev/qe_lib/Kconfig +++ /dev/null @@ -1,27 +0,0 @@ -# -# QE Communication options -# - -config UCC_SLOW - bool - default y if SERIAL_QE - help - This option provides qe_lib support to UCC slow - protocols: UART, BISYNC, QMC - -config UCC_FAST - bool - default y if UCC_GETH || FSL_UCC_TDM || FSL_UCC_HDLC - help - This option provides qe_lib support to UCC fast - protocols: HDLC, Ethernet, ATM, transparent - -config UCC - bool - default y if UCC_FAST || UCC_SLOW - -config QE_USB - bool - default y if USB_FSL_QE - help - QE USB Controller support diff --git a/drivers/net/ethernet/freescale/fman/src/wrapper/lnxwrp_fm.c b/drivers/net/ethernet/freescale/fman/src/wrapper/lnxwrp_fm.c index 427de85..74b0de8 100755 --- a/drivers/net/ethernet/freescale/fman/src/wrapper/lnxwrp_fm.c +++ b/drivers/net/ethernet/freescale/fman/src/wrapper/lnxwrp_fm.c @@ -58,7 +58,7 @@ #include <linux/of_irq.h> #include <asm/uaccess.h> #include <asm/errno.h> -#include <asm/qe.h> /* For struct qe_firmware */ +#include <linux/fsl/qe.h> /* For struct qe_firmware */ #include <sysdev/fsl_soc.h> #include <asm/fsl_pm.h> #include <linux/stat.h> /* For file access mask */ diff --git a/drivers/net/ethernet/freescale/fsl_pq_mdio.c b/drivers/net/ethernet/freescale/fsl_pq_mdio.c index c4f6506..dd5d405b 100644 --- a/drivers/net/ethernet/freescale/fsl_pq_mdio.c +++ b/drivers/net/ethernet/freescale/fsl_pq_mdio.c @@ -29,7 +29,7 @@ #include <linux/of_device.h> #include <asm/io.h> -#include <asm/ucc.h> /* for ucc_set_qe_mux_mii_mng() */ +#include <linux/fsl/ucc.h> /* for ucc_set_qe_mux_mii_mng() */ #include "gianfar.h" diff --git a/drivers/net/ethernet/freescale/ucc_geth.c b/drivers/net/ethernet/freescale/ucc_geth.c index 5930c39..fbaedd3 100644 --- a/drivers/net/ethernet/freescale/ucc_geth.c +++ b/drivers/net/ethernet/freescale/ucc_geth.c @@ -38,10 +38,10 @@ #include <asm/uaccess.h> #include <asm/irq.h> #include <asm/io.h> -#include <asm/immap_qe.h> -#include <asm/qe.h> -#include <asm/ucc.h> -#include <asm/ucc_fast.h> +#include <linux/fsl/immap_qe.h> +#include <linux/fsl/qe.h> +#include <linux/fsl/ucc.h> +#include <linux/fsl/ucc_fast.h> #include <asm/machdep.h> #include "ucc_geth.h" diff --git a/drivers/net/ethernet/freescale/ucc_geth.h b/drivers/net/ethernet/freescale/ucc_geth.h index 75f3371..a803635 100644 --- a/drivers/net/ethernet/freescale/ucc_geth.h +++ b/drivers/net/ethernet/freescale/ucc_geth.h @@ -22,11 +22,11 @@ #include <linux/list.h> #include <linux/if_ether.h> -#include <asm/immap_qe.h> -#include <asm/qe.h> +#include <linux/fsl/immap_qe.h> +#include <linux/fsl/qe.h> -#include <asm/ucc.h> -#include <asm/ucc_fast.h> +#include <linux/fsl/ucc.h> +#include <linux/fsl/ucc_fast.h> #define DRV_DESC "QE UCC Gigabit Ethernet Controller" #define DRV_NAME "ucc_geth" diff --git a/drivers/net/wan/fsl_ucc_hdlc.h b/drivers/net/wan/fsl_ucc_hdlc.h index e0c8a4a..93cc20cc 100644 --- a/drivers/net/wan/fsl_ucc_hdlc.h +++ b/drivers/net/wan/fsl_ucc_hdlc.h @@ -14,11 +14,11 @@ #include <linux/kernel.h> #include <linux/list.h> -#include <asm/immap_qe.h> -#include <asm/qe.h> +#include <linux/fsl/immap_qe.h> +#include <linux/fsl/qe.h> -#include <asm/ucc.h> -#include <asm/ucc_fast.h> +#include <linux/fsl/ucc.h> +#include <linux/fsl/ucc_fast.h> /* SI RAM entries */ #define SIR_LAST 0x0001 diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig index 522e7fc..bb02cfa 100644 --- a/drivers/soc/Kconfig +++ b/drivers/soc/Kconfig @@ -13,4 +13,6 @@ if FSL_SOC_DRIVERS source "drivers/soc/fsl/Kconfig" endif +source drivers/soc/qe/Kconfig + endmenu diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index b40b228..1212b75 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile @@ -3,3 +3,5 @@ # obj-$(CONFIG_FSL_SOC_DRIVERS) += fsl/ + +obj-$(CONFIG_QUICC_ENGINE) += qe/ diff --git a/drivers/soc/qe/Kconfig b/drivers/soc/qe/Kconfig new file mode 100644 index 0000000..5c2b9d8 --- /dev/null +++ b/drivers/soc/qe/Kconfig @@ -0,0 +1,47 @@ +# +# QE Communication options +# + +config QUICC_ENGINE + bool "Freescale QUICC Engine (QE) Support" + depends on FSL_SOC && (PPC32 || PPC64) + select PPC_LIB_RHEAP + select CRC32 + ---help--- + The QUICC Engine (QE) is a new generation of communications + coprocessors on Freescale embedded CPUs (akin to CPM in older chips). + Selecting this option means that you wish to build a kernel + for a machine with a QE coprocessor. + +config QE_GPIO + bool "QE GPIO support" + depends on QUICC_ENGINE + select ARCH_REQUIRE_GPIOLIB + ---help--- + Say Y here if you're going to use hardware that connects to the + QE GPIOs. + + +config UCC_SLOW + bool + default y if SERIAL_QE + help + This option provides qe_lib support to UCC slow + protocols: UART, BISYNC, QMC + +config UCC_FAST + bool + default y if UCC_GETH || FSL_UCC_TDM || FSL_UCC_HDLC + help + This option provides qe_lib support to UCC fast + protocols: HDLC, Ethernet, ATM, transparent + +config UCC + bool + default y if UCC_FAST || UCC_SLOW + +config QE_USB + bool + default y if USB_FSL_QE + help + QE USB Controller support diff --git a/arch/powerpc/sysdev/qe_lib/Makefile b/drivers/soc/qe/Makefile index f1855c1..f1855c1 100644 --- a/arch/powerpc/sysdev/qe_lib/Makefile +++ b/drivers/soc/qe/Makefile diff --git a/arch/powerpc/sysdev/qe_lib/gpio.c b/drivers/soc/qe/gpio.c index 521e67a..fb891d4 100644 --- a/arch/powerpc/sysdev/qe_lib/gpio.c +++ b/drivers/soc/qe/gpio.c @@ -21,7 +21,7 @@ #include <linux/gpio.h> #include <linux/slab.h> #include <linux/export.h> -#include <asm/qe.h> +#include <linux/fsl/qe.h> struct qe_gpio_chip { struct of_mm_gpio_chip mm_gc; @@ -158,7 +158,8 @@ struct qe_pin *qe_pin_request(struct device_node *np, int index) if (WARN_ON(!gc)) goto err0; - if (!of_device_is_compatible(gc->of_node, "fsl,mpc8323-qe-pario-bank")) { + if (!of_device_is_compatible(gc->of_node, + "fsl,mpc8323-qe-pario-bank")) { pr_debug("%s: tried to get a non-qe pin\n", __func__); err = -EINVAL; goto err0; diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/drivers/soc/qe/qe.c index ad324ba..25f0e0d 100644 --- a/arch/powerpc/sysdev/qe_lib/qe.c +++ b/drivers/soc/qe/qe.c @@ -2,8 +2,8 @@ * Copyright (C) 2006-2010, 2012 Freescale Semiconductor, Inc. * All rights reserved. * - * Authors: Shlomi Gridish <gridish@freescale.com> - * Li Yang <leoli@freescale.com> + * Authors: Shlomi Gridish <gridish@freescale.com> + * Li Yang <leoli@freescale.com> * Based on cpm2_common.c from Dan Malek (dmalek@jlc.net) * * Description: @@ -33,8 +33,8 @@ #include <asm/irq.h> #include <asm/page.h> #include <asm/pgtable.h> -#include <asm/immap_qe.h> -#include <asm/qe.h> +#include <linux/fsl/immap_qe.h> +#include <linux/fsl/qe.h> #include <asm/prom.h> #include <asm/rheap.h> @@ -65,7 +65,8 @@ struct qe_snum { struct qe_immap __iomem *qe_immr; EXPORT_SYMBOL(qe_immr); -static struct qe_snum snums[QE_NUM_OF_SNUM]; /* Dynamically allocated SNUMs */ +/* Dynamically allocated SNUMs */ +static struct qe_snum snums[QE_NUM_OF_SNUM]; static unsigned int qe_num_of_snum; static phys_addr_t qebase = -1; @@ -93,7 +94,6 @@ phys_addr_t get_qe_base(void) return qebase; } - EXPORT_SYMBOL(get_qe_base); void qe_reset(void) @@ -165,7 +165,7 @@ EXPORT_SYMBOL(qe_issue_cmd); * Baud rate clocks are zero-based in the driver code (as that maps * to port numbers). Documentation uses 1-based numbering. */ -static unsigned int brg_clk = 0; +static unsigned int brg_clk; unsigned int qe_get_brg_clk(void) { @@ -238,7 +238,8 @@ EXPORT_SYMBOL(qe_setbrg); */ enum qe_clock qe_clock_source(const char *source) { - unsigned int i; + unsigned int ret; + unsigned long val; if (strcasecmp(source, "none") == 0) return QE_CLK_NONE; @@ -250,17 +251,22 @@ enum qe_clock qe_clock_source(const char *source) return QE_RSYNC_PIN; if (strncasecmp(source, "brg", 3) == 0) { - i = simple_strtoul(source + 3, NULL, 10); - if ((i >= 1) && (i <= 16)) - return (QE_BRG1 - 1) + i; + ret = kstrtoul(source + 3, 10, &val); + if (ret) + return ret; + + if ((val >= 1) && (val <= 16)) + return (QE_BRG1 - 1) + val; else return QE_CLK_DUMMY; } if (strncasecmp(source, "clk", 3) == 0) { - i = simple_strtoul(source + 3, NULL, 10); - if ((i >= 1) && (i <= 24)) - return (QE_CLK1 - 1) + i; + ret = kstrtoul(source + 3, 10, &val); + if (ret) + return ret; + if ((val >= 1) && (val <= 24)) + return (QE_CLK1 - 1) + val; else return QE_CLK_DUMMY; } @@ -360,8 +366,8 @@ static int qe_sdma_init(void) } out_be32(&sdma->sdebcr, (u32) sdma_buf_offset & QE_SDEBCR_BA_MASK); - out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK | - (0x1 << QE_SDMR_CEN_SHIFT))); + out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK | + (0x1 << QE_SDMR_CEN_SHIFT))); return 0; } @@ -391,12 +397,10 @@ static void qe_upload_microcode(const void *base, unsigned int i; if (ucode->major || ucode->minor || ucode->revision) - printk(KERN_INFO "qe-firmware: " - "uploading microcode '%s' version %u.%u.%u\n", + pr_info("qe-FM: uploading microcode '%s' version %u.%u.%u\n", ucode->id, ucode->major, ucode->minor, ucode->revision); else - printk(KERN_INFO "qe-firmware: " - "uploading microcode '%s'\n", ucode->id); + pr_info("qe-FM: uploading microcode '%s'\n", ucode->id); /* Use auto-increment */ out_be32(&qe_immr->iram.iadd, be32_to_cpu(ucode->iram_offset) | @@ -404,7 +408,7 @@ static void qe_upload_microcode(const void *base, for (i = 0; i < be32_to_cpu(ucode->count); i++) out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i])); - + /* Set I-RAM Ready Register */ out_be32(&qe_immr->iram.iready, be32_to_cpu(QE_IRAM_READY)); } @@ -436,7 +440,7 @@ int qe_upload_firmware(const struct qe_firmware *firmware) const struct qe_header *hdr; if (!firmware) { - printk(KERN_ERR "qe-firmware: invalid pointer\n"); + pr_info("qe-firmware: invalid pointer\n"); return -EINVAL; } @@ -446,19 +450,19 @@ int qe_upload_firmware(const struct qe_firmware *firmware) /* Check the magic */ if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') || (hdr->magic[2] != 'F')) { - printk(KERN_ERR "qe-firmware: not a microcode\n"); + pr_info("qe-firmware: not a microcode\n"); return -EPERM; } /* Check the version */ if (hdr->version != 1) { - printk(KERN_ERR "qe-firmware: unsupported version\n"); + pr_info("qe-firmware: unsupported version\n"); return -EPERM; } /* Validate some of the fields */ if ((firmware->count < 1) || (firmware->count > MAX_QE_RISC)) { - printk(KERN_ERR "qe-firmware: invalid data\n"); + pr_info("qe-firmware: invalid data\n"); return -EINVAL; } @@ -476,14 +480,14 @@ int qe_upload_firmware(const struct qe_firmware *firmware) /* Validate the length */ if (length != calc_size + sizeof(__be32)) { - printk(KERN_ERR "qe-firmware: invalid length\n"); + pr_info("qe-firmware: invalid length\n"); return -EPERM; } /* Validate the CRC */ crc = be32_to_cpu(*(__be32 *)((void *)firmware + calc_size)); if (crc != crc32(0, firmware, calc_size)) { - printk(KERN_ERR "qe-firmware: firmware CRC is invalid\n"); + pr_info("qe-firmware: firmware CRC is invalid\n"); return -EIO; } @@ -494,12 +498,11 @@ int qe_upload_firmware(const struct qe_firmware *firmware) setbits16(&qe_immr->cp.cercr, QE_CP_CERCR_CIR); if (firmware->soc.model) - printk(KERN_INFO - "qe-firmware: firmware '%s' for %u V%u.%u\n", + pr_info("qe-firmware: firmware '%s' for %u V%u.%u\n", firmware->id, be16_to_cpu(firmware->soc.model), firmware->soc.major, firmware->soc.minor); else - printk(KERN_INFO "qe-firmware: firmware '%s'\n", + pr_info("qe-firmware: firmware '%s'\n", firmware->id); /* diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/drivers/soc/qe/qe_ic.c index b2b87c3..1968f22 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.c +++ b/drivers/soc/qe/qe_ic.c @@ -26,9 +26,9 @@ #include <linux/bootmem.h> #include <linux/spinlock.h> #include <asm/irq.h> -#include <asm/io.h> +#include <linux/io.h> #include <asm/prom.h> -#include <asm/qe_ic.h> +#include <linux/fsl/qe_ic.h> #include "qe_ic.h" @@ -175,12 +175,12 @@ static struct qe_ic_info qe_ic_info[] = { }, }; -static inline u32 qe_ic_read(volatile __be32 __iomem * base, unsigned int reg) +static inline u32 qe_ic_read(__be32 __iomem *base, unsigned int reg) { return in_be32(base + (reg >> 2)); } -static inline void qe_ic_write(volatile __be32 __iomem * base, unsigned int reg, +static inline void qe_ic_write(__be32 __iomem *base, unsigned int reg, u32 value) { out_be32(base + (reg >> 2), value); @@ -258,7 +258,7 @@ static int qe_ic_host_map(struct irq_domain *h, unsigned int virq, struct irq_chip *chip; if (qe_ic_info[hw].mask == 0) { - printk(KERN_ERR "Can't map reserved IRQ\n"); + pr_err("Can't map reserved IRQ\n"); return -EINVAL; } /* Default chip */ @@ -341,7 +341,7 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags, qe_ic->virq_low = irq_of_parse_and_map(node, 1); if (qe_ic->virq_low == NO_IRQ) { - printk(KERN_ERR "Failed to map QE_IC low IRQ\n"); + pr_err("Failed to map QE_IC low IRQ\n"); kfree(qe_ic); return; } @@ -483,16 +483,16 @@ static int __init init_qe_ic_sysfs(void) { int rc; - printk(KERN_DEBUG "Registering qe_ic with sysfs...\n"); + pr_debug("Registering qe_ic with sysfs...\n"); rc = subsys_system_register(&qe_ic_subsys, NULL); if (rc) { - printk(KERN_ERR "Failed registering qe_ic sys class\n"); + pr_err("Failed registering qe_ic sys class\n"); return -ENODEV; } rc = device_register(&device_qe_ic); if (rc) { - printk(KERN_ERR "Failed registering qe_ic sys device\n"); + pr_err("Failed registering qe_ic sys device\n"); return -ENODEV; } return 0; diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.h b/drivers/soc/qe/qe_ic.h index efef7ab..aab8abd 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.h +++ b/drivers/soc/qe/qe_ic.h @@ -16,7 +16,7 @@ #ifndef _POWERPC_SYSDEV_QE_IC_H #define _POWERPC_SYSDEV_QE_IC_H -#include <asm/qe_ic.h> +#include <linux/fsl/qe_ic.h> #define NR_QE_IC_INTS 64 @@ -76,7 +76,7 @@ struct qe_ic { /* Control registers offset */ - volatile u32 __iomem *regs; + u32 __iomem *regs; /* The remapper for this QEIC */ struct irq_domain *irqhost; diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/drivers/soc/qe/qe_io.c index a88807b..939e903 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_io.c +++ b/drivers/soc/qe/qe_io.c @@ -21,15 +21,15 @@ #include <linux/module.h> #include <linux/ioport.h> -#include <asm/io.h> -#include <asm/qe.h> +#include <linux/io.h> +#include <linux/fsl/qe.h> #include <asm/prom.h> #include <sysdev/fsl_soc.h> #undef DEBUG static struct qe_pio_regs __iomem *par_io; -static int num_par_io_ports = 0; +static int num_par_io_ports; int par_io_init(struct device_node *np) { @@ -157,13 +157,13 @@ int par_io_of_config(struct device_node *np) const unsigned int *pio_map; if (par_io == NULL) { - printk(KERN_ERR "par_io not initialized\n"); + pr_info("par_io not initialized\n"); return -1; } ph = of_get_property(np, "pio-handle", NULL); if (ph == NULL) { - printk(KERN_ERR "pio-handle not available\n"); + pr_info("pio-handle not available\n"); return -1; } @@ -171,12 +171,12 @@ int par_io_of_config(struct device_node *np) pio_map = of_get_property(pio, "pio-map", &pio_map_len); if (pio_map == NULL) { - printk(KERN_ERR "pio-map is not set!\n"); + pr_info("pio-map is not set!\n"); return -1; } pio_map_len /= sizeof(unsigned int); if ((pio_map_len % 6) != 0) { - printk(KERN_ERR "pio-map format wrong!\n"); + pr_info("pio-map format wrong!\n"); return -1; } @@ -197,22 +197,21 @@ static void dump_par_io(void) { unsigned int i; - printk(KERN_INFO "%s: par_io=%p\n", __func__, par_io); + pr_info("%s: par_io=%p\n", __func__, par_io); for (i = 0; i < num_par_io_ports; i++) { - printk(KERN_INFO " cpodr[%u]=%08x\n", i, + pr_info(" cpodr[%u]=%08x\n", i, in_be32(&par_io[i].cpodr)); - printk(KERN_INFO " cpdata[%u]=%08x\n", i, + pr_info(" cpdata[%u]=%08x\n", i, in_be32(&par_io[i].cpdata)); - printk(KERN_INFO " cpdir1[%u]=%08x\n", i, + pr_info(" cpdir1[%u]=%08x\n", i, in_be32(&par_io[i].cpdir1)); - printk(KERN_INFO " cpdir2[%u]=%08x\n", i, + pr_info(" cpdir2[%u]=%08x\n", i, in_be32(&par_io[i].cpdir2)); - printk(KERN_INFO " cppar1[%u]=%08x\n", i, + pr_info(" cppar1[%u]=%08x\n", i, in_be32(&par_io[i].cppar1)); - printk(KERN_INFO " cppar2[%u]=%08x\n", i, + pr_info(" cppar2[%u]=%08x\n", i, in_be32(&par_io[i].cppar2)); } - } EXPORT_SYMBOL(dump_par_io); #endif /* DEBUG */ diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/drivers/soc/qe/ucc.c index 1e27d63..c333387 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc.c +++ b/drivers/soc/qe/ucc.c @@ -5,8 +5,8 @@ * * Copyright (C) 2006, 2012 Freescale Semiconductor, Inc. All rights reserved. * - * Authors: Shlomi Gridish <gridish@freescale.com> - * Li Yang <leoli@freescale.com> + * Authors: Shlomi Gridish <gridish@freescale.com> + * Li Yang <leoli@freescale.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -21,10 +21,10 @@ #include <linux/export.h> #include <asm/irq.h> -#include <asm/io.h> -#include <asm/immap_qe.h> -#include <asm/qe.h> -#include <asm/ucc.h> +#include <linux/io.h> +#include <linux/fsl/immap_qe.h> +#include <linux/fsl/qe.h> +#include <linux/fsl/ucc.h> int ucc_set_qe_mux_mii_mng(unsigned int ucc_num) { @@ -59,21 +59,29 @@ int ucc_set_type(unsigned int ucc_num, enum ucc_speed_type speed) /* The GUEMR register is at the same location for both slow and fast devices, so we just use uccX.slow.guemr. */ switch (ucc_num) { - case 0: guemr = &qe_immr->ucc1.slow.guemr; + case 0: + guemr = &qe_immr->ucc1.slow.guemr; break; - case 1: guemr = &qe_immr->ucc2.slow.guemr; + case 1: + guemr = &qe_immr->ucc2.slow.guemr; break; - case 2: guemr = &qe_immr->ucc3.slow.guemr; + case 2: + guemr = &qe_immr->ucc3.slow.guemr; break; - case 3: guemr = &qe_immr->ucc4.slow.guemr; + case 3: + guemr = &qe_immr->ucc4.slow.guemr; break; - case 4: guemr = &qe_immr->ucc5.slow.guemr; + case 4: + guemr = &qe_immr->ucc5.slow.guemr; break; - case 5: guemr = &qe_immr->ucc6.slow.guemr; + case 5: + guemr = &qe_immr->ucc6.slow.guemr; break; - case 6: guemr = &qe_immr->ucc7.slow.guemr; + case 6: + guemr = &qe_immr->ucc7.slow.guemr; break; - case 7: guemr = &qe_immr->ucc8.slow.guemr; + case 7: + guemr = &qe_immr->ucc8.slow.guemr; break; default: return -EINVAL; @@ -136,67 +144,156 @@ int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock, switch (reg_num) { case 1: switch (clock) { - case QE_BRG1: clock_bits = 1; break; - case QE_BRG2: clock_bits = 2; break; - case QE_BRG7: clock_bits = 3; break; - case QE_BRG8: clock_bits = 4; break; - case QE_CLK9: clock_bits = 5; break; - case QE_CLK10: clock_bits = 6; break; - case QE_CLK11: clock_bits = 7; break; - case QE_CLK12: clock_bits = 8; break; - case QE_CLK15: clock_bits = 9; break; - case QE_CLK16: clock_bits = 10; break; - default: break; + case QE_BRG1: + clock_bits = 1; + break; + case QE_BRG2: + clock_bits = 2; + break; + case QE_BRG7: + clock_bits = 3; + break; + case QE_BRG8: + clock_bits = 4; + break; + case QE_CLK9: + clock_bits = 5; + break; + case QE_CLK10: + clock_bits = 6; + break; + case QE_CLK11: + clock_bits = 7; + break; + case QE_CLK12: + clock_bits = 8; + break; + case QE_CLK15: + clock_bits = 9; + break; + case QE_CLK16: + clock_bits = 10; + break; + default: + break; } break; case 2: switch (clock) { - case QE_BRG5: clock_bits = 1; break; - case QE_BRG6: clock_bits = 2; break; - case QE_BRG7: clock_bits = 3; break; - case QE_BRG8: clock_bits = 4; break; - case QE_CLK13: clock_bits = 5; break; - case QE_CLK14: clock_bits = 6; break; - case QE_CLK19: clock_bits = 7; break; - case QE_CLK20: clock_bits = 8; break; - case QE_CLK15: clock_bits = 9; break; - case QE_CLK16: clock_bits = 10; break; - default: break; + case QE_BRG5: + clock_bits = 1; + break; + case QE_BRG6: + clock_bits = 2; + break; + case QE_BRG7: + clock_bits = 3; + break; + case QE_BRG8: + clock_bits = 4; + break; + case QE_CLK13: + clock_bits = 5; + break; + case QE_CLK14: + clock_bits = 6; + break; + case QE_CLK19: + clock_bits = 7; + break; + case QE_CLK20: + clock_bits = 8; + break; + case QE_CLK15: + clock_bits = 9; + break; + case QE_CLK16: + clock_bits = 10; + break; + default: + break; } break; case 3: switch (clock) { - case QE_BRG9: clock_bits = 1; break; - case QE_BRG10: clock_bits = 2; break; - case QE_BRG15: clock_bits = 3; break; - case QE_BRG16: clock_bits = 4; break; - case QE_CLK3: clock_bits = 5; break; - case QE_CLK4: clock_bits = 6; break; - case QE_CLK17: clock_bits = 7; break; - case QE_CLK18: clock_bits = 8; break; - case QE_CLK7: clock_bits = 9; break; - case QE_CLK8: clock_bits = 10; break; - case QE_CLK16: clock_bits = 11; break; - default: break; + case QE_BRG9: + clock_bits = 1; + break; + case QE_BRG10: + clock_bits = 2; + break; + case QE_BRG15: + clock_bits = 3; + break; + case QE_BRG16: + clock_bits = 4; + break; + case QE_CLK3: + clock_bits = 5; + break; + case QE_CLK4: + clock_bits = 6; + break; + case QE_CLK17: + clock_bits = 7; + break; + case QE_CLK18: + clock_bits = 8; + break; + case QE_CLK7: + clock_bits = 9; + break; + case QE_CLK8: + clock_bits = 10; + break; + case QE_CLK16: + clock_bits = 11; + break; + default: + break; } break; case 4: switch (clock) { - case QE_BRG13: clock_bits = 1; break; - case QE_BRG14: clock_bits = 2; break; - case QE_BRG15: clock_bits = 3; break; - case QE_BRG16: clock_bits = 4; break; - case QE_CLK5: clock_bits = 5; break; - case QE_CLK6: clock_bits = 6; break; - case QE_CLK21: clock_bits = 7; break; - case QE_CLK22: clock_bits = 8; break; - case QE_CLK7: clock_bits = 9; break; - case QE_CLK8: clock_bits = 10; break; - case QE_CLK16: clock_bits = 11; break; - default: break; + case QE_BRG13: + clock_bits = 1; + break; + case QE_BRG14: + clock_bits = 2; + break; + case QE_BRG15: + clock_bits = 3; + break; + case QE_BRG16: + clock_bits = 4; + break; + case QE_CLK5: + clock_bits = 5; + break; + case QE_CLK6: + clock_bits = 6; + break; + case QE_CLK21: + clock_bits = 7; + break; + case QE_CLK22: + clock_bits = 8; + break; + case QE_CLK7: + clock_bits = 9; + break; + case QE_CLK8: + clock_bits = 10; + break; + case QE_CLK16: + clock_bits = 11; + break; + default: + break; } break; - default: break; + default: + break; } /* Check for invalid combination of clock and UCC number */ diff --git a/arch/powerpc/sysdev/qe_lib/ucc_fast.c b/drivers/soc/qe/ucc_fast.c index 67191a0..8088852 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc_fast.c +++ b/drivers/soc/qe/ucc_fast.c @@ -1,8 +1,8 @@ /* * Copyright (C) 2006, 2012 Freescale Semiconductor, Inc. All rights reserved. * - * Authors: Shlomi Gridish <gridish@freescale.com> - * Li Yang <leoli@freescale.com> + * Authors: Shlomi Gridish <gridish@freescale.com> + * Li Yang <leoli@freescale.com> * * Description: * QE UCC Fast API Set - UCC Fast specific routines implementations. @@ -21,53 +21,53 @@ #include <linux/err.h> #include <linux/export.h> -#include <asm/io.h> -#include <asm/immap_qe.h> -#include <asm/qe.h> +#include <linux/io.h> +#include <linux/fsl/immap_qe.h> +#include <linux/fsl/qe.h> -#include <asm/ucc.h> -#include <asm/ucc_fast.h> +#include <linux/fsl/ucc.h> +#include <linux/fsl/ucc_fast.h> -void ucc_fast_dump_regs(struct ucc_fast_private * uccf) +void ucc_fast_dump_regs(struct ucc_fast_private *uccf) { - printk(KERN_INFO "UCC%u Fast registers:\n", uccf->uf_info->ucc_num); - printk(KERN_INFO "Base address: 0x%p\n", uccf->uf_regs); + pr_info("UCC%u Fast registers:\n", uccf->uf_info->ucc_num); + pr_info("Base address: 0x%p\n", uccf->uf_regs); - printk(KERN_INFO "gumr : addr=0x%p, val=0x%08x\n", + pr_info("gumr : addr=0x%p, val=0x%08x\n", &uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr)); - printk(KERN_INFO "upsmr : addr=0x%p, val=0x%08x\n", + pr_info("upsmr : addr=0x%p, val=0x%08x\n", &uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr)); - printk(KERN_INFO "utodr : addr=0x%p, val=0x%04x\n", + pr_info("utodr : addr=0x%p, val=0x%04x\n", &uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr)); - printk(KERN_INFO "udsr : addr=0x%p, val=0x%04x\n", + pr_info("udsr : addr=0x%p, val=0x%04x\n", &uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr)); - printk(KERN_INFO "ucce : addr=0x%p, val=0x%08x\n", + pr_info("ucce : addr=0x%p, val=0x%08x\n", &uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce)); - printk(KERN_INFO "uccm : addr=0x%p, val=0x%08x\n", + pr_info("uccm : addr=0x%p, val=0x%08x\n", &uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm)); - printk(KERN_INFO "uccs : addr=0x%p, val=0x%02x\n", + pr_info("uccs : addr=0x%p, val=0x%02x\n", &uccf->uf_regs->uccs, in_8(&uccf->uf_regs->uccs)); - printk(KERN_INFO "urfb : addr=0x%p, val=0x%08x\n", + pr_info("urfb : addr=0x%p, val=0x%08x\n", &uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb)); - printk(KERN_INFO "urfs : addr=0x%p, val=0x%04x\n", + pr_info("urfs : addr=0x%p, val=0x%04x\n", &uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs)); - printk(KERN_INFO "urfet : addr=0x%p, val=0x%04x\n", + pr_info("urfet : addr=0x%p, val=0x%04x\n", &uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet)); - printk(KERN_INFO "urfset: addr=0x%p, val=0x%04x\n", + pr_info("urfset: addr=0x%p, val=0x%04x\n", &uccf->uf_regs->urfset, in_be16(&uccf->uf_regs->urfset)); - printk(KERN_INFO "utfb : addr=0x%p, val=0x%08x\n", + pr_info("utfb : addr=0x%p, val=0x%08x\n", &uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb)); - printk(KERN_INFO "utfs : addr=0x%p, val=0x%04x\n", + pr_info("utfs : addr=0x%p, val=0x%04x\n", &uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs)); - printk(KERN_INFO "utfet : addr=0x%p, val=0x%04x\n", + pr_info("utfet : addr=0x%p, val=0x%04x\n", &uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet)); - printk(KERN_INFO "utftt : addr=0x%p, val=0x%04x\n", + pr_info("utftt : addr=0x%p, val=0x%04x\n", &uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt)); - printk(KERN_INFO "utpt : addr=0x%p, val=0x%04x\n", + pr_info("utpt : addr=0x%p, val=0x%04x\n", &uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt)); - printk(KERN_INFO "urtry : addr=0x%p, val=0x%08x\n", + pr_info("urtry : addr=0x%p, val=0x%08x\n", &uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry)); - printk(KERN_INFO "guemr : addr=0x%p, val=0x%02x\n", + pr_info("guemr : addr=0x%p, val=0x%02x\n", &uccf->uf_regs->guemr, in_8(&uccf->uf_regs->guemr)); } EXPORT_SYMBOL(ucc_fast_dump_regs); @@ -88,13 +88,13 @@ u32 ucc_fast_get_qe_cr_subblock(int uccf_num) } EXPORT_SYMBOL(ucc_fast_get_qe_cr_subblock); -void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf) +void ucc_fast_transmit_on_demand(struct ucc_fast_private *uccf) { out_be16(&uccf->uf_regs->utodr, UCC_FAST_TOD); } EXPORT_SYMBOL(ucc_fast_transmit_on_demand); -void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode) +void ucc_fast_enable(struct ucc_fast_private *uccf, enum comm_dir mode) { struct ucc_fast __iomem *uf_regs; u32 gumr; @@ -115,7 +115,7 @@ void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode) } EXPORT_SYMBOL(ucc_fast_enable); -void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode) +void ucc_fast_disable(struct ucc_fast_private *uccf, enum comm_dir mode) { struct ucc_fast __iomem *uf_regs; u32 gumr; @@ -136,7 +136,8 @@ void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode) } EXPORT_SYMBOL(ucc_fast_disable); -int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret) +int ucc_fast_init(struct ucc_fast_info *uf_info, + struct ucc_fast_private **uccf_ret) { struct ucc_fast_private *uccf; struct ucc_fast __iomem *uf_regs; @@ -148,56 +149,56 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc /* check if the UCC port number is in range. */ if ((uf_info->ucc_num < 0) || (uf_info->ucc_num > UCC_MAX_NUM - 1)) { - printk(KERN_ERR "%s: illegal UCC number\n", __func__); + pr_err("%s: illegal UCC number\n", __func__); return -EINVAL; } /* Check that 'max_rx_buf_length' is properly aligned (4). */ if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) { - printk(KERN_ERR "%s: max_rx_buf_length not aligned\n", + pr_err("%s: max_rx_buf_length not aligned\n", __func__); return -EINVAL; } /* Validate Virtual Fifo register values */ if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) { - printk(KERN_ERR "%s: urfs is too small\n", __func__); + pr_err("%s: urfs is too small\n", __func__); return -EINVAL; } if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { - printk(KERN_ERR "%s: urfs is not aligned\n", __func__); + pr_err("%s: urfs is not aligned\n", __func__); return -EINVAL; } if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { - printk(KERN_ERR "%s: urfet is not aligned.\n", __func__); + pr_err("%s: urfet is not aligned.\n", __func__); return -EINVAL; } if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { - printk(KERN_ERR "%s: urfset is not aligned\n", __func__); + pr_err("%s: urfset is not aligned\n", __func__); return -EINVAL; } if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { - printk(KERN_ERR "%s: utfs is not aligned\n", __func__); + pr_err("%s: utfs is not aligned\n", __func__); return -EINVAL; } if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { - printk(KERN_ERR "%s: utfet is not aligned\n", __func__); + pr_err("%s: utfet is not aligned\n", __func__); return -EINVAL; } if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { - printk(KERN_ERR "%s: utftt is not aligned\n", __func__); + pr_err("%s: utftt is not aligned\n", __func__); return -EINVAL; } uccf = kzalloc(sizeof(struct ucc_fast_private), GFP_KERNEL); if (!uccf) { - printk(KERN_ERR "%s: Cannot allocate private data\n", + pr_err("%s: Cannot allocate private data\n", __func__); return -ENOMEM; } @@ -207,7 +208,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc /* Set the PHY base address */ uccf->uf_regs = ioremap(uf_info->regs, sizeof(struct ucc_fast)); if (uccf->uf_regs == NULL) { - printk(KERN_ERR "%s: Cannot map UCC registers\n", __func__); + pr_err("%s: Cannot map UCC registers\n", __func__); kfree(uccf); return -ENOMEM; } @@ -231,7 +232,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc /* Set UCC to fast type */ ret = ucc_set_type(uf_info->ucc_num, UCC_SPEED_TYPE_FAST); if (ret) { - printk(KERN_ERR "%s: cannot set UCC type\n", __func__); + pr_err("%s: cannot set UCC type\n", __func__); ucc_fast_free(uccf); return ret; } @@ -270,7 +271,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc uccf->ucc_fast_tx_virtual_fifo_base_offset = qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT); if (IS_ERR_VALUE(uccf->ucc_fast_tx_virtual_fifo_base_offset)) { - printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO\n", + pr_err("%s: cannot allocate MURAM for TX FIFO\n", __func__); uccf->ucc_fast_tx_virtual_fifo_base_offset = 0; ucc_fast_free(uccf); @@ -283,7 +284,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT); if (IS_ERR_VALUE(uccf->ucc_fast_rx_virtual_fifo_base_offset)) { - printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO\n", + pr_err("%s: cannot allocate MURAM for RX FIFO\n", __func__); uccf->ucc_fast_rx_virtual_fifo_base_offset = 0; ucc_fast_free(uccf); @@ -314,7 +315,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc if ((uf_info->rx_clock != QE_CLK_NONE) && ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->rx_clock, COMM_DIR_RX)) { - printk(KERN_ERR "%s: illegal value for RX clock\n", + pr_err("%s: illegal value for RX clock\n", __func__); ucc_fast_free(uccf); return -EINVAL; @@ -323,7 +324,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc if ((uf_info->tx_clock != QE_CLK_NONE) && ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->tx_clock, COMM_DIR_TX)) { - printk(KERN_ERR "%s: illegal value for TX clock\n", + pr_err("%s: illegal value for TX clock\n", __func__); ucc_fast_free(uccf); return -EINVAL; @@ -381,7 +382,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc } EXPORT_SYMBOL(ucc_fast_init); -void ucc_fast_free(struct ucc_fast_private * uccf) +void ucc_fast_free(struct ucc_fast_private *uccf) { if (!uccf) return; diff --git a/arch/powerpc/sysdev/qe_lib/ucc_slow.c b/drivers/soc/qe/ucc_slow.c index 1c062f4..d023f19 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc_slow.c +++ b/drivers/soc/qe/ucc_slow.c @@ -1,8 +1,8 @@ /* * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved. * - * Authors: Shlomi Gridish <gridish@freescale.com> - * Li Yang <leoli@freescale.com> + * Authors: Shlomi Gridish <gridish@freescale.com> + * Li Yang <leoli@freescale.com> * * Description: * QE UCC Slow API Set - UCC Slow specific routines implementations. @@ -21,12 +21,12 @@ #include <linux/err.h> #include <linux/export.h> -#include <asm/io.h> -#include <asm/immap_qe.h> -#include <asm/qe.h> +#include <linux/io.h> +#include <linux/fsl/immap_qe.h> +#include <linux/fsl/qe.h> -#include <asm/ucc.h> -#include <asm/ucc_slow.h> +#include <linux/fsl/ucc.h> +#include <linux/fsl/ucc_slow.h> u32 ucc_slow_get_qe_cr_subblock(int uccs_num) { @@ -44,12 +44,12 @@ u32 ucc_slow_get_qe_cr_subblock(int uccs_num) } EXPORT_SYMBOL(ucc_slow_get_qe_cr_subblock); -void ucc_slow_poll_transmitter_now(struct ucc_slow_private * uccs) +void ucc_slow_poll_transmitter_now(struct ucc_slow_private *uccs) { out_be16(&uccs->us_regs->utodr, UCC_SLOW_TOD); } -void ucc_slow_graceful_stop_tx(struct ucc_slow_private * uccs) +void ucc_slow_graceful_stop_tx(struct ucc_slow_private *uccs) { struct ucc_slow_info *us_info = uccs->us_info; u32 id; @@ -60,7 +60,7 @@ void ucc_slow_graceful_stop_tx(struct ucc_slow_private * uccs) } EXPORT_SYMBOL(ucc_slow_graceful_stop_tx); -void ucc_slow_stop_tx(struct ucc_slow_private * uccs) +void ucc_slow_stop_tx(struct ucc_slow_private *uccs) { struct ucc_slow_info *us_info = uccs->us_info; u32 id; @@ -70,7 +70,7 @@ void ucc_slow_stop_tx(struct ucc_slow_private * uccs) } EXPORT_SYMBOL(ucc_slow_stop_tx); -void ucc_slow_restart_tx(struct ucc_slow_private * uccs) +void ucc_slow_restart_tx(struct ucc_slow_private *uccs) { struct ucc_slow_info *us_info = uccs->us_info; u32 id; @@ -80,7 +80,7 @@ void ucc_slow_restart_tx(struct ucc_slow_private * uccs) } EXPORT_SYMBOL(ucc_slow_restart_tx); -void ucc_slow_enable(struct ucc_slow_private * uccs, enum comm_dir mode) +void ucc_slow_enable(struct ucc_slow_private *uccs, enum comm_dir mode) { struct ucc_slow *us_regs; u32 gumr_l; @@ -101,7 +101,7 @@ void ucc_slow_enable(struct ucc_slow_private * uccs, enum comm_dir mode) } EXPORT_SYMBOL(ucc_slow_enable); -void ucc_slow_disable(struct ucc_slow_private * uccs, enum comm_dir mode) +void ucc_slow_disable(struct ucc_slow_private *uccs, enum comm_dir mode) { struct ucc_slow *us_regs; u32 gumr_l; @@ -126,7 +126,8 @@ EXPORT_SYMBOL(ucc_slow_disable); * * The caller should initialize the following us_info */ -int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** uccs_ret) +int ucc_slow_init(struct ucc_slow_info *us_info, + struct ucc_slow_private **uccs_ret) { struct ucc_slow_private *uccs; u32 i; @@ -142,7 +143,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc /* check if the UCC port number is in range. */ if ((us_info->ucc_num < 0) || (us_info->ucc_num > UCC_MAX_NUM - 1)) { - printk(KERN_ERR "%s: illegal UCC number\n", __func__); + pr_err("%s: illegal UCC number\n", __func__); return -EINVAL; } @@ -154,13 +155,13 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc */ if ((!us_info->rfw) && (us_info->max_rx_buf_length & (UCC_SLOW_MRBLR_ALIGNMENT - 1))) { - printk(KERN_ERR "max_rx_buf_length not aligned.\n"); + pr_err("max_rx_buf_length not aligned.\n"); return -EINVAL; } uccs = kzalloc(sizeof(struct ucc_slow_private), GFP_KERNEL); if (!uccs) { - printk(KERN_ERR "%s: Cannot allocate private data\n", + pr_err("%s: Cannot allocate private data\n", __func__); return -ENOMEM; } @@ -170,7 +171,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc /* Set the PHY base address */ uccs->us_regs = ioremap(us_info->regs, sizeof(struct ucc_slow)); if (uccs->us_regs == NULL) { - printk(KERN_ERR "%s: Cannot map UCC registers\n", __func__); + pr_err("%s: Cannot map UCC registers\n", __func__); kfree(uccs); return -ENOMEM; } @@ -178,8 +179,8 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc uccs->saved_uccm = 0; uccs->p_rx_frame = 0; us_regs = uccs->us_regs; - uccs->p_ucce = (u16 *) & (us_regs->ucce); - uccs->p_uccm = (u16 *) & (us_regs->uccm); + uccs->p_ucce = (u16 *)&(us_regs->ucce); + uccs->p_uccm = (u16 *)&(us_regs->uccm); #ifdef STATISTICS uccs->rx_frames = 0; uccs->tx_frames = 0; @@ -190,7 +191,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc uccs->us_pram_offset = qe_muram_alloc(UCC_SLOW_PRAM_SIZE, ALIGNMENT_OF_UCC_SLOW_PRAM); if (IS_ERR_VALUE(uccs->us_pram_offset)) { - printk(KERN_ERR "%s: cannot allocate MURAM for PRAM", __func__); + pr_err("%s: cannot allocate MURAM for PRAM", __func__); ucc_slow_free(uccs); return -ENOMEM; } @@ -203,7 +204,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc /* Set UCC to slow type */ ret = ucc_set_type(us_info->ucc_num, UCC_SPEED_TYPE_SLOW); if (ret) { - printk(KERN_ERR "%s: cannot set UCC type", __func__); + pr_err("%s: cannot set UCC type", __func__); ucc_slow_free(uccs); return ret; } @@ -217,7 +218,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc qe_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd), QE_ALIGNMENT_OF_BD); if (IS_ERR_VALUE(uccs->rx_base_offset)) { - printk(KERN_ERR "%s: cannot allocate %u RX BDs\n", __func__, + pr_err("%s: cannot allocate %u RX BDs\n", __func__, us_info->rx_bd_ring_len); uccs->rx_base_offset = 0; ucc_slow_free(uccs); @@ -228,7 +229,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc qe_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd), QE_ALIGNMENT_OF_BD); if (IS_ERR_VALUE(uccs->tx_base_offset)) { - printk(KERN_ERR "%s: cannot allocate TX BDs", __func__); + pr_err("%s: cannot allocate TX BDs", __func__); uccs->tx_base_offset = 0; ucc_slow_free(uccs); return -ENOMEM; @@ -251,13 +252,13 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc bd = uccs->rx_bd = qe_muram_addr(uccs->rx_base_offset); for (i = 0; i < us_info->rx_bd_ring_len - 1; i++) { /* set bd status and length */ - out_be32((u32*)bd, 0); + out_be32((u32 *)bd, 0); /* clear bd buffer */ out_be32(&bd->buf, 0); bd++; } /* for last BD set Wrap bit */ - out_be32((u32*)bd, cpu_to_be32(R_W)); + out_be32((u32 *)bd, cpu_to_be32(R_W)); out_be32(&bd->buf, 0); /* Set GUMR (For more details see the hardware spec.). */ @@ -317,7 +318,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc /* Rx clock routing */ if (ucc_set_qe_mux_rxtx(us_info->ucc_num, us_info->rx_clock, COMM_DIR_RX)) { - printk(KERN_ERR "%s: illegal value for RX clock\n", + pr_err("%s: illegal value for RX clock\n", __func__); ucc_slow_free(uccs); return -EINVAL; @@ -325,7 +326,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc /* Tx clock routing */ if (ucc_set_qe_mux_rxtx(us_info->ucc_num, us_info->tx_clock, COMM_DIR_TX)) { - printk(KERN_ERR "%s: illegal value for TX clock\n", + pr_err("%s: illegal value for TX clock\n", __func__); ucc_slow_free(uccs); return -EINVAL; @@ -357,7 +358,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc } EXPORT_SYMBOL(ucc_slow_init); -void ucc_slow_free(struct ucc_slow_private * uccs) +void ucc_slow_free(struct ucc_slow_private *uccs) { if (!uccs) return; @@ -377,4 +378,3 @@ void ucc_slow_free(struct ucc_slow_private * uccs) kfree(uccs); } EXPORT_SYMBOL(ucc_slow_free); - diff --git a/arch/powerpc/sysdev/qe_lib/usb.c b/drivers/soc/qe/usb.c index 27f23bd..58f812a 100644 --- a/arch/powerpc/sysdev/qe_lib/usb.c +++ b/drivers/soc/qe/usb.c @@ -17,8 +17,8 @@ #include <linux/errno.h> #include <linux/export.h> #include <linux/io.h> -#include <asm/immap_qe.h> -#include <asm/qe.h> +#include <linux/fsl/immap_qe.h> +#include <linux/fsl/qe.h> int qe_usb_clock_set(enum qe_clock clk, int rate) { @@ -27,16 +27,36 @@ int qe_usb_clock_set(enum qe_clock clk, int rate) u32 val; switch (clk) { - case QE_CLK3: val = QE_CMXGCR_USBCS_CLK3; break; - case QE_CLK5: val = QE_CMXGCR_USBCS_CLK5; break; - case QE_CLK7: val = QE_CMXGCR_USBCS_CLK7; break; - case QE_CLK9: val = QE_CMXGCR_USBCS_CLK9; break; - case QE_CLK13: val = QE_CMXGCR_USBCS_CLK13; break; - case QE_CLK17: val = QE_CMXGCR_USBCS_CLK17; break; - case QE_CLK19: val = QE_CMXGCR_USBCS_CLK19; break; - case QE_CLK21: val = QE_CMXGCR_USBCS_CLK21; break; - case QE_BRG9: val = QE_CMXGCR_USBCS_BRG9; break; - case QE_BRG10: val = QE_CMXGCR_USBCS_BRG10; break; + case QE_CLK3: + val = QE_CMXGCR_USBCS_CLK3; + break; + case QE_CLK5: + val = QE_CMXGCR_USBCS_CLK5; + break; + case QE_CLK7: + val = QE_CMXGCR_USBCS_CLK7; + break; + case QE_CLK9: + val = QE_CMXGCR_USBCS_CLK9; + break; + case QE_CLK13: + val = QE_CMXGCR_USBCS_CLK13; + break; + case QE_CLK17: + val = QE_CMXGCR_USBCS_CLK17; + break; + case QE_CLK19: + val = QE_CMXGCR_USBCS_CLK19; + break; + case QE_CLK21: + val = QE_CMXGCR_USBCS_CLK21; + break; + case QE_BRG9: + val = QE_CMXGCR_USBCS_BRG9; + break; + case QE_BRG10: + val = QE_CMXGCR_USBCS_BRG10; + break; default: pr_err("%s: requested unknown clock %d\n", __func__, clk); return -EINVAL; diff --git a/drivers/spi/spi-fsl-cpm.c b/drivers/spi/spi-fsl-cpm.c index 07971e3..e856d85 100644 --- a/drivers/spi/spi-fsl-cpm.c +++ b/drivers/spi/spi-fsl-cpm.c @@ -21,7 +21,7 @@ #include <linux/fsl_devices.h> #include <linux/dma-mapping.h> #include <asm/cpm.h> -#include <asm/qe.h> +#include <linux/fsl/qe.h> #include "spi-fsl-lib.h" #include "spi-fsl-cpm.h" diff --git a/drivers/tdm/device/fsl_ucc_tdm.h b/drivers/tdm/device/fsl_ucc_tdm.h index 1a1b161..a1213fa 100644 --- a/drivers/tdm/device/fsl_ucc_tdm.h +++ b/drivers/tdm/device/fsl_ucc_tdm.h @@ -31,11 +31,11 @@ #include <linux/kernel.h> #include <linux/list.h> -#include <asm/immap_qe.h> -#include <asm/qe.h> +#include <linux/fsl/immap_qe.h> +#include <linux/fsl/qe.h> -#include <asm/ucc.h> -#include <asm/ucc_fast.h> +#include <linux/fsl/ucc.h> +#include <linux/fsl/ucc_fast.h> /* SI RAM entries */ #define SIR_LAST 0x0001 diff --git a/drivers/tty/serial/ucc_uart.c b/drivers/tty/serial/ucc_uart.c index 8831748..4718ebe 100644 --- a/drivers/tty/serial/ucc_uart.c +++ b/drivers/tty/serial/ucc_uart.c @@ -29,7 +29,7 @@ #include <linux/dma-mapping.h> #include <linux/fs_uart_pd.h> -#include <asm/ucc_slow.h> +#include <linux/fsl/ucc_slow.h> #include <linux/firmware.h> #include <asm/reg.h> diff --git a/drivers/usb/gadget/fsl_qe_udc.c b/drivers/usb/gadget/fsl_qe_udc.c index f3bb363..d41d8e2 100644 --- a/drivers/usb/gadget/fsl_qe_udc.c +++ b/drivers/usb/gadget/fsl_qe_udc.c @@ -38,7 +38,7 @@ #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> #include <linux/usb/otg.h> -#include <asm/qe.h> +#include <linux/fsl/qe.h> #include <asm/cpm.h> #include <asm/dma.h> #include <asm/reg.h> diff --git a/drivers/usb/host/fhci-hcd.c b/drivers/usb/host/fhci-hcd.c index 0b4654259..fe5fa06 100644 --- a/drivers/usb/host/fhci-hcd.c +++ b/drivers/usb/host/fhci-hcd.c @@ -29,7 +29,7 @@ #include <linux/of_platform.h> #include <linux/of_gpio.h> #include <linux/slab.h> -#include <asm/qe.h> +#include <linux/fsl/qe.h> #include <asm/fsl_gtm.h> #include "fhci.h" diff --git a/drivers/usb/host/fhci-hub.c b/drivers/usb/host/fhci-hub.c index 6af2512..31b4402 100644 --- a/drivers/usb/host/fhci-hub.c +++ b/drivers/usb/host/fhci-hub.c @@ -24,7 +24,7 @@ #include <linux/usb.h> #include <linux/usb/hcd.h> #include <linux/gpio.h> -#include <asm/qe.h> +#include <linux/fsl/qe.h> #include "fhci.h" /* virtual root hub specific descriptor */ diff --git a/drivers/usb/host/fhci-sched.c b/drivers/usb/host/fhci-sched.c index 95ca598..6f1d4ad 100644 --- a/drivers/usb/host/fhci-sched.c +++ b/drivers/usb/host/fhci-sched.c @@ -25,7 +25,7 @@ #include <linux/io.h> #include <linux/usb.h> #include <linux/usb/hcd.h> -#include <asm/qe.h> +#include <linux/fsl/qe.h> #include <asm/fsl_gtm.h> #include "fhci.h" diff --git a/drivers/usb/host/fhci.h b/drivers/usb/host/fhci.h index 154e6a0..d7c49531 100644 --- a/drivers/usb/host/fhci.h +++ b/drivers/usb/host/fhci.h @@ -27,8 +27,8 @@ #include <linux/io.h> #include <linux/usb.h> #include <linux/usb/hcd.h> -#include <asm/qe.h> -#include <asm/immap_qe.h> +#include <linux/fsl/qe.h> +#include <linux/fsl/immap_qe.h> #define USB_CLOCK 48000000 diff --git a/arch/powerpc/include/asm/immap_qe.h b/include/linux/fsl/immap_qe.h index c76ef30..bd1ebd4 100644 --- a/arch/powerpc/include/asm/immap_qe.h +++ b/include/linux/fsl/immap_qe.h @@ -2,11 +2,11 @@ * QUICC Engine (QE) Internal Memory Map. * The Internal Memory Map for devices with QE on them. This * is the superset of all QE devices (8360, etc.). - * Copyright (C) 2006. Freescale Semiconductor, Inc. All rights reserved. * - * Authors: Shlomi Gridish <gridish@freescale.com> - * Li Yang <leoli@freescale.com> + * Authors: + * Shlomi Gridish <gridish@freescale.com> + * Li Yang <leoli@freescale.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -18,7 +18,7 @@ #ifdef __KERNEL__ #include <linux/kernel.h> -#include <asm/io.h> +#include <linux/io.h> #define QE_IMMAP_SIZE (1024 * 1024) /* 1MB from 1MB+IMMR */ @@ -29,7 +29,7 @@ struct qe_iram { u8 res0[0x04]; __be32 iready; /* I-RAM Ready Register */ u8 res1[0x70]; -} __attribute__ ((packed)); +} __packed; /* QE Interrupt Controller */ struct qe_ic_regs { @@ -52,7 +52,7 @@ struct qe_ic_regs { u8 res2[0x20]; __be32 qhivec; u8 res3[0x1C]; -} __attribute__ ((packed)); +} __packed; /* Communications Processor */ struct cp_qe { @@ -90,7 +90,7 @@ struct cp_qe { u8 res12[0x3A]; __be32 ceurnr; /* QE microcode revision number register */ u8 res13[0x244]; -} __attribute__ ((packed)); +} __packed; /* QE Multiplexer */ struct qe_mux { @@ -101,7 +101,7 @@ struct qe_mux { __be32 cmxucr[4]; /* CMX UCCx clock route registers */ __be32 cmxupcr; /* CMX UPC clock route register */ u8 res0[0x1C]; -} __attribute__ ((packed)); +} __packed; /* QE Timers */ struct qe_timers { @@ -131,13 +131,13 @@ struct qe_timers { __be16 gtevr4; /* Timer 4 event register */ __be16 gtps; /* Timer 1 prescale register */ u8 res2[0x46]; -} __attribute__ ((packed)); +} __packed; /* BRG */ struct qe_brg { __be32 brgc[16]; /* BRG configuration registers */ u8 res0[0x40]; -} __attribute__ ((packed)); +} __packed; /* SPI */ struct spi { @@ -155,7 +155,7 @@ struct spi { __be32 spitd; /* SPI transmit data register (cpu mode) */ __be32 spird; /* SPI receive data register (cpu mode) */ u8 res7[0x8]; -} __attribute__ ((packed)); +} __packed; /* SI */ struct si1 { @@ -199,14 +199,14 @@ struct si1 { __be32 siml1; /* SI1 multiframe limit register */ u8 siedm1; /* SI1 extended diagnostic mode register */ u8 res9[0xBB]; -} __attribute__ ((packed)); +} __packed; /* SI Routing Tables */ struct sir { - u8 tx[0x400]; + u8 tx[0x400]; u8 rx[0x400]; u8 res0[0x800]; -} __attribute__ ((packed)); +} __packed; /* USB Controller */ struct qe_usb_ctlr { @@ -225,7 +225,7 @@ struct qe_usb_ctlr { u8 res5[2]; __be16 usb_usfrn; u8 res6[0x22]; -} __attribute__ ((packed)); +} __packed; /* MCC */ struct qe_mcc { @@ -234,7 +234,7 @@ struct qe_mcc { __be32 mccf; /* MCC configuration register */ __be32 merl; /* MCC emergency request level register */ u8 res0[0xF0]; -} __attribute__ ((packed)); +} __packed; /* QE UCC Slow */ struct ucc_slow { @@ -253,7 +253,7 @@ struct ucc_slow { __be16 utpt; u8 res4[0x52]; u8 guemr; /* UCC general extended mode register */ -} __attribute__ ((packed)); +} __packed; /* QE UCC Fast */ struct ucc_fast { @@ -285,7 +285,7 @@ struct ucc_fast { __be32 urtry; /* UCC retry counter register */ u8 res8[0x4C]; u8 guemr; /* UCC general extended mode register */ -} __attribute__ ((packed)); +} __packed; struct ucc { union { @@ -293,7 +293,7 @@ struct ucc { struct ucc_fast fast; u8 res[0x200]; /* UCC blocks are 512 bytes each */ }; -} __attribute__ ((packed)); +} __packed; /* MultiPHY UTOPIA POS Controllers (UPC) */ struct upc { @@ -349,7 +349,7 @@ struct upc { __be32 uper3; /* Device 3 port enable register */ __be32 uper4; /* Device 4 port enable register */ u8 res2[0x150]; -} __attribute__ ((packed)); +} __packed; /* SDMA */ struct sdma { @@ -369,7 +369,7 @@ struct sdma { u8 res1[0x4]; __be32 sdebcr; /* SDMA CAM entries base register */ u8 res2[0x38]; -} __attribute__ ((packed)); +} __packed; /* Debug Space */ struct dbg { @@ -386,7 +386,7 @@ struct dbg { __be32 bprmsr; /* Breakpoint request mode serial register */ __be32 bpemr; /* Breakpoint exit mode register */ u8 res2[0x48]; -} __attribute__ ((packed)); +} __packed; /* * RISC Special Registers (Trap and Breakpoint). These are described in @@ -421,7 +421,7 @@ struct rsp { __be32 eccr; /* Exception control configuration register */ __be32 eicr; u8 res4[0x100-0xf8]; -} __attribute__ ((packed)); +} __packed; struct qe_immap { struct qe_iram iram; /* I-RAM */ @@ -461,7 +461,7 @@ struct qe_immap { Multi-user RAM */ u8 res17[0x24000]; /* 0x11C000 - 0x140000 */ u8 res18[0xC0000]; /* 0x140000 - 0x200000 */ -} __attribute__ ((packed)); +} __packed; extern struct qe_immap __iomem *qe_immr; extern phys_addr_t get_qe_base(void); diff --git a/arch/powerpc/include/asm/qe.h b/include/linux/fsl/qe.h index a7387c2..c96ff9e 100644 --- a/arch/powerpc/include/asm/qe.h +++ b/include/linux/fsl/qe.h @@ -1,8 +1,8 @@ /* * Copyright (C) 2006, 2012 Freescale Semiconductor, Inc. All rights reserved. * - * Authors: Shlomi Gridish <gridish@freescale.com> - * Li Yang <leoli@freescale.com> + * Authors: Shlomi Gridish <gridish@freescale.com> + * Li Yang <leoli@freescale.com> * * Description: * QUICC Engine (QE) external definitions and structure. @@ -20,7 +20,7 @@ #include <linux/errno.h> #include <linux/err.h> #include <asm/cpm.h> -#include <asm/immap_qe.h> +#include <linux/fsl/immap_qe.h> #define QE_NUM_OF_SNUM 256 /* There are 256 serial number in QE */ #define QE_NUM_OF_BRGS 16 @@ -213,30 +213,30 @@ struct qe_firmware { u8 split; /* 0 = shared I-RAM, 1 = split I-RAM */ u8 count; /* Number of microcode[] structures */ struct { - __be16 model; /* The SOC model */ - u8 major; /* The SOC revision major */ - u8 minor; /* The SOC revision minor */ - } __attribute__ ((packed)) soc; + __be16 model; /* The SOC model */ + u8 major; /* The SOC revision major */ + u8 minor; /* The SOC revision minor */ + } __packed soc; u8 padding[4]; /* Reserved, for alignment */ __be64 extended_modes; /* Extended modes */ __be32 vtraps[8]; /* Virtual trap addresses */ u8 reserved[4]; /* Reserved, for future expansion */ struct qe_microcode { - u8 id[32]; /* Null-terminated identifier */ + u8 id[32]; /* Null-terminated identifier */ __be32 traps[16]; /* Trap addresses, 0 == ignore */ - __be32 eccr; /* The value for the ECCR register */ + __be32 eccr; /* The value for the ECCR register */ __be32 iram_offset; /* Offset into I-RAM for the code */ - __be32 count; /* Number of 32-bit words of the code */ + __be32 count; /* Number of 32-bit words of the code */ __be32 code_offset; /* Offset of the actual microcode */ - u8 major; /* The microcode version major */ - u8 minor; /* The microcode version minor */ + u8 major; /* The microcode version major */ + u8 minor; /* The microcode version minor */ u8 revision; /* The microcode version revision */ u8 padding; /* Reserved, for alignment */ u8 reserved[4]; /* Reserved, for future expansion */ - } __attribute__ ((packed)) microcode[1]; + } __packed microcode[1]; /* All microcode binaries should be located here */ /* CRC32 should be located here, after the microcode binaries */ -} __attribute__ ((packed)); +} __packed; struct qe_firmware_info { char id[64]; /* Firmware name */ @@ -265,7 +265,7 @@ struct qe_bd { __be16 status; __be16 length; __be32 buf; -} __attribute__ ((packed)); +} __packed; #define BD_STATUS_MASK 0xffff0000 #define BD_LENGTH_MASK 0x0000ffff @@ -315,14 +315,14 @@ struct qe_timer_tables { u16 r_tmv; /* QE timer valid register */ u32 tm_cmd; /* QE timer cmd register */ u32 tm_cnt; /* QE timer internal cnt */ -} __attribute__ ((packed)); +} __packed; #define QE_FLTR_TAD_SIZE 8 /* QE extended filtering Termination Action Descriptor (TAD) */ struct qe_fltr_tad { u8 serialized[QE_FLTR_TAD_SIZE]; -} __attribute__ ((packed)); +} __packed; /* Communication Direction */ enum comm_dir { @@ -542,7 +542,7 @@ struct ucc_slow_pram { __be32 ttemp; /* Tx temp */ __be32 rcrc; /* temp receive CRC */ __be32 tcrc; /* temp transmit CRC */ -} __attribute__ ((packed)); +} __packed; /* General UCC SLOW Mode Register (GUMRH & GUMRL) */ #define UCC_SLOW_GUMR_H_SAM_QMC 0x00000000 diff --git a/arch/powerpc/include/asm/qe_ic.h b/include/linux/fsl/qe_ic.h index 25784cc..79f162c 100644 --- a/arch/powerpc/include/asm/qe_ic.h +++ b/include/linux/fsl/qe_ic.h @@ -1,8 +1,8 @@ /* * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved. * - * Authors: Shlomi Gridish <gridish@freescale.com> - * Li Yang <leoli@freescale.com> + * Authors: Shlomi Gridish <gridish@freescale.com> + * Li Yang <leoli@freescale.com> * * Description: * QE IC external definitions and structure. diff --git a/arch/powerpc/include/asm/ucc.h b/include/linux/fsl/ucc.h index 39a0bb5..622e2fc 100644 --- a/arch/powerpc/include/asm/ucc.h +++ b/include/linux/fsl/ucc.h @@ -1,8 +1,8 @@ /* * Copyright (C) 2006, 2012 Freescale Semiconductor, Inc. All rights reserved. * - * Authors: Shlomi Gridish <gridish@freescale.com> - * Li Yang <leoli@freescale.com> + * Authors: Shlomi Gridish <gridish@freescale.com> + * Li Yang <leoli@freescale.com> * * Description: * Internal header file for UCC unit routines. @@ -15,8 +15,8 @@ #ifndef __UCC_H__ #define __UCC_H__ -#include <asm/immap_qe.h> -#include <asm/qe.h> +#include <linux/fsl/immap_qe.h> +#include <linux/fsl/qe.h> #define STATISTICS diff --git a/arch/powerpc/include/asm/ucc_fast.h b/include/linux/fsl/ucc_fast.h index 561b00b..ec24f28 100644 --- a/arch/powerpc/include/asm/ucc_fast.h +++ b/include/linux/fsl/ucc_fast.h @@ -3,8 +3,8 @@ * * Copyright (C) 2006, 2012 Freescale Semiconductor, Inc. All rights reserved. * - * Authors: Shlomi Gridish <gridish@freescale.com> - * Li Yang <leoli@freescale.com> + * Authors: Shlomi Gridish <gridish@freescale.com> + * Li Yang <leoli@freescale.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -16,10 +16,10 @@ #include <linux/kernel.h> -#include <asm/immap_qe.h> -#include <asm/qe.h> +#include <linux/fsl/immap_qe.h> +#include <linux/fsl/qe.h> -#include <asm/ucc.h> +#include <linux/fsl/ucc.h> /* Receive BD's status */ #define R_E 0x80000000 /* buffer empty */ @@ -195,14 +195,15 @@ struct ucc_fast_private { * uf_info - (In) pointer to the fast UCC info structure. * uccf_ret - (Out) pointer to the fast UCC structure. */ -int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret); +int ucc_fast_init(struct ucc_fast_info *uf_info, + struct ucc_fast_private **uccf_ret); /* ucc_fast_free * Frees all resources for fast UCC. * * uccf - (In) pointer to the fast UCC structure. */ -void ucc_fast_free(struct ucc_fast_private * uccf); +void ucc_fast_free(struct ucc_fast_private *uccf); /* ucc_fast_enable * Enables a fast UCC port. @@ -211,7 +212,7 @@ void ucc_fast_free(struct ucc_fast_private * uccf); * uccf - (In) pointer to the fast UCC structure. * mode - (In) TX, RX, or both. */ -void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode); +void ucc_fast_enable(struct ucc_fast_private *uccf, enum comm_dir mode); /* ucc_fast_disable * Disables a fast UCC port. @@ -220,7 +221,7 @@ void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode); * uccf - (In) pointer to the fast UCC structure. * mode - (In) TX, RX, or both. */ -void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode); +void ucc_fast_disable(struct ucc_fast_private *uccf, enum comm_dir mode); /* ucc_fast_irq * Handles interrupts on fast UCC. @@ -228,7 +229,7 @@ void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode); * * uccf - (In) pointer to the fast UCC structure. */ -void ucc_fast_irq(struct ucc_fast_private * uccf); +void ucc_fast_irq(struct ucc_fast_private *uccf); /* ucc_fast_transmit_on_demand * Immediately forces a poll of the transmitter for data to be sent. @@ -241,10 +242,10 @@ void ucc_fast_irq(struct ucc_fast_private * uccf); * * uccf - (In) pointer to the fast UCC structure. */ -void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf); +void ucc_fast_transmit_on_demand(struct ucc_fast_private *uccf); u32 ucc_fast_get_qe_cr_subblock(int uccf_num); -void ucc_fast_dump_regs(struct ucc_fast_private * uccf); +void ucc_fast_dump_regs(struct ucc_fast_private *uccf); #endif /* __UCC_FAST_H__ */ diff --git a/arch/powerpc/include/asm/ucc_slow.h b/include/linux/fsl/ucc_slow.h index c44131e..56c0318 100644 --- a/arch/powerpc/include/asm/ucc_slow.h +++ b/include/linux/fsl/ucc_slow.h @@ -1,8 +1,8 @@ /* * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved. * - * Authors: Shlomi Gridish <gridish@freescale.com> - * Li Yang <leoli@freescale.com> + * Authors: Shlomi Gridish <gridish@freescale.com> + * Li Yang <leoli@freescale.com> * * Description: * Internal header file for UCC SLOW unit routines. @@ -17,10 +17,10 @@ #include <linux/kernel.h> -#include <asm/immap_qe.h> -#include <asm/qe.h> +#include <linux/fsl/immap_qe.h> +#include <linux/fsl/qe.h> -#include <asm/ucc.h> +#include <linux/fsl/ucc.h> /* transmit BD's status */ #define T_R 0x80000000 /* ready bit */ @@ -224,14 +224,15 @@ struct ucc_slow_private { * us_info - (In) pointer to the slow UCC info structure. * uccs_ret - (Out) pointer to the slow UCC structure. */ -int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** uccs_ret); +int ucc_slow_init(struct ucc_slow_info *us_info, + struct ucc_slow_private **uccs_ret); /* ucc_slow_free * Frees all resources for slow UCC. * * uccs - (In) pointer to the slow UCC structure. */ -void ucc_slow_free(struct ucc_slow_private * uccs); +void ucc_slow_free(struct ucc_slow_private *uccs); /* ucc_slow_enable * Enables a fast UCC port. @@ -240,7 +241,7 @@ void ucc_slow_free(struct ucc_slow_private * uccs); * uccs - (In) pointer to the slow UCC structure. * mode - (In) TX, RX, or both. */ -void ucc_slow_enable(struct ucc_slow_private * uccs, enum comm_dir mode); +void ucc_slow_enable(struct ucc_slow_private *uccs, enum comm_dir mode); /* ucc_slow_disable * Disables a fast UCC port. @@ -249,7 +250,7 @@ void ucc_slow_enable(struct ucc_slow_private * uccs, enum comm_dir mode); * uccs - (In) pointer to the slow UCC structure. * mode - (In) TX, RX, or both. */ -void ucc_slow_disable(struct ucc_slow_private * uccs, enum comm_dir mode); +void ucc_slow_disable(struct ucc_slow_private *uccs, enum comm_dir mode); /* ucc_slow_poll_transmitter_now * Immediately forces a poll of the transmitter for data to be sent. @@ -262,21 +263,21 @@ void ucc_slow_disable(struct ucc_slow_private * uccs, enum comm_dir mode); * * uccs - (In) pointer to the slow UCC structure. */ -void ucc_slow_poll_transmitter_now(struct ucc_slow_private * uccs); +void ucc_slow_poll_transmitter_now(struct ucc_slow_private *uccs); /* ucc_slow_graceful_stop_tx * Smoothly stops transmission on a specified slow UCC. * * uccs - (In) pointer to the slow UCC structure. */ -void ucc_slow_graceful_stop_tx(struct ucc_slow_private * uccs); +void ucc_slow_graceful_stop_tx(struct ucc_slow_private *uccs); /* ucc_slow_stop_tx * Stops transmission on a specified slow UCC. * * uccs - (In) pointer to the slow UCC structure. */ -void ucc_slow_stop_tx(struct ucc_slow_private * uccs); +void ucc_slow_stop_tx(struct ucc_slow_private *uccs); /* ucc_slow_restart_tx * Restarts transmitting on a specified slow UCC. |