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| author | Olof Johansson <olof@lixom.net> | 2012-01-17 06:46:06 (GMT) |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2012-01-17 06:46:06 (GMT) |
| commit | 8b0f6d12de91345190f234edba781b2fd03257b6 (patch) | |
| tree | 4b6015433a0ffe5fc7ff9115014e3da580581f4b /arch/arm/mach-exynos | |
| parent | 916e5ebb9f5a154bb845d555a1a84ef48411b73a (diff) | |
| parent | efb963dcd9854c70667cdba9b5854b7290f1cefd (diff) | |
| download | linux-fsl-qoriq-8b0f6d12de91345190f234edba781b2fd03257b6.tar.xz | |
Merge branch 'fixes-for-arm-soc' of git://sources.calxeda.com/kernel/linux into fixes
* 'fixes-for-arm-soc' of git://sources.calxeda.com/kernel/linux:
ARM: make BSYM macro assembly only
ARM: highbank: remove incorrect BSYM usage
ARM: imx: remove incorrect BSYM usage
ARM: exynos: remove incorrect BSYM usage
ARM: ux500: add missing ENDPROC to headsmp.S
ARM: msm: Add missing ENDPROC to headsmp.S
ARM: versatile: Add missing ENDPROC to headsmp.S
Diffstat (limited to 'arch/arm/mach-exynos')
| -rw-r--r-- | arch/arm/mach-exynos/headsmp.S | 2 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/platsmp.c | 5 |
2 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S index 3cdeb36..5364d4b 100644 --- a/arch/arm/mach-exynos/headsmp.S +++ b/arch/arm/mach-exynos/headsmp.S @@ -36,6 +36,8 @@ pen: ldr r7, [r6] * should now contain the SVC stack for this core */ b secondary_startup +ENDPROC(exynos4_secondary_startup) + .align 2 1: .long . .long pen_release diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 60bc45e..683aec7 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -24,7 +24,6 @@ #include <asm/cacheflush.h> #include <asm/hardware/gic.h> #include <asm/smp_scu.h> -#include <asm/unified.h> #include <mach/hardware.h> #include <mach/regs-clock.h> @@ -137,7 +136,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) while (time_before(jiffies, timeout)) { smp_rmb(); - __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), + __raw_writel(virt_to_phys(exynos4_secondary_startup), CPU1_BOOT_REG); gic_raise_softirq(cpumask_of(cpu), 1); @@ -192,6 +191,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus) * until it receives a soft interrupt, and then the * secondary CPU branches to this address. */ - __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), + __raw_writel(virt_to_phys(exynos4_secondary_startup), CPU1_BOOT_REG); } |