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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2005-07-28 19:32:47 (GMT) |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-07-28 19:32:47 (GMT) |
| commit | 505d7b193181be029f4f9aea59e6bdbfdd1e9e76 (patch) | |
| tree | ffcdb1fe79171bb0e6e02c0c197541d1b73ad5b0 /arch/arm | |
| parent | 41c018b7ecb60b1c2c4d5dee0cd37d32a94c45af (diff) | |
| download | linux-fsl-qoriq-505d7b193181be029f4f9aea59e6bdbfdd1e9e76.tar.xz | |
[ARM SMP] Ensure secondary CPUs have a clean TLB
Since ARMv6 CPUs will not flush the TLB on context switches, it is
possible that we may end up with some global TLB entries remaining
present, eventually upsetting userspace. Explicitly flush the
entire TLB on secondary CPUs as they startup, after we have switched
to the init_mm page tables.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/kernel/smp.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 295e0a8..b208573 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -176,6 +176,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) cpu_set(cpu, mm->cpu_vm_mask); cpu_switch_mm(mm->pgd, mm); enter_lazy_tlb(mm, current); + local_flush_tlb_all(); cpu_init(); |