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authorChao Fu <B44548@freescale.com>2014-10-15 06:27:07 (GMT)
committerMatthew Weigel <Matthew.Weigel@freescale.com>2014-12-11 18:38:14 (GMT)
commitcda356bb018b242ac6d91a68a4533014e3937157 (patch)
treea485178d1fdaba3aba14aa7be564cf7e60cf81c4 /arch/arm
parent2be3e54fea5e6565dc70a839b0972a5c9613462f (diff)
downloadlinux-fsl-qoriq-cda356bb018b242ac6d91a68a4533014e3937157.tar.xz
arm:dts:ls1021a:add qspi-memory address and correct qspi compatible
The new QSPI driver add DDR read mode, so add qspi-memory map for QSPI access in DDR mode in dts node. Modify qspi node compatible for LS1 paltform. Signed-off-by: Chao Fu <b44548@freescale.com> Change-Id: Ia92dda63bf857b845767ae62f2c7eb9a84371aa1 Reviewed-on: http://git.am.freescale.net:8181/21356 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/ls1021a.dtsi6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index c6a8d18..5144952 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -96,10 +96,12 @@
};
qspi: quadspi@1550000 {
- compatible = "fsl,vf610-qspi";
+ compatible = "fsl,ls1-qspi";
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x0 0x1550000 0x0 0x10000>;
+ reg = <0x0 0x1550000 0x0 0x10000>,
+ <0x0 0x40000000 0x0 0x10000000>;
+ reg-names = "QuadSPI", "QuadSPI-memory";
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "qspi_en", "qspi";
clocks = <&platform_clk 1>, <&platform_clk 1>;