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| author | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 19:01:21 (GMT) |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-09 00:30:24 (GMT) |
| commit | f6ab95b55735fa03cad8d0f966647e5df206e207 (patch) | |
| tree | 958127a8b5e171d53d26cd1a40d128e34bf8c7b1 /arch/avr32 | |
| parent | bb3207863014c7310593146f11fbc6573eab43c8 (diff) | |
| download | linux-fsl-qoriq-f6ab95b55735fa03cad8d0f966647e5df206e207.tar.xz | |
ioat: preserve chanctrl bits when re-arming interrupts
The register write in ioat_dma_cleanup_tasklet is unfortunate in two
ways:
1/ It clears the extra 'enable' bits that we set at alloc_chan_resources time
2/ It gives the impression that it disables interrupts when it is in
fact re-arming interrupts
[ Impact: fix, persist the value of the chanctrl register when re-arming ]
Signed-off-by: Maciej Sosnowski <maciej.sosnowski@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'arch/avr32')
0 files changed, 0 insertions, 0 deletions