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author | Ralf Baechle <ralf@linux-mips.org> | 2007-11-24 22:33:28 (GMT) |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-11-26 17:26:14 (GMT) |
commit | 940f6b48a130e0a33cb8bd397dd0e277166470ad (patch) | |
tree | 03bd36fcb9b5c8d77f5de2930ff32d770f5cdf4e /arch/mips/pmc-sierra | |
parent | 5aa85c9fc49a6ce44dc10a42e2011bbde9dc445a (diff) | |
download | linux-fsl-qoriq-940f6b48a130e0a33cb8bd397dd0e277166470ad.tar.xz |
[MIPS] Only build r4k clocksource for systems that work ok with it.
In particular as-is it's not suited for multicore and mutiprocessors
systems where there is on guarantee that the counter are synchronized
or running from the same clock at all. This broke Sibyte and probably
others since the "[MIPS] Handle R4000/R4400 mfc0 from count register."
commit.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pmc-sierra')
-rw-r--r-- | arch/mips/pmc-sierra/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/pmc-sierra/Kconfig b/arch/mips/pmc-sierra/Kconfig index 6b293ce..90261b8 100644 --- a/arch/mips/pmc-sierra/Kconfig +++ b/arch/mips/pmc-sierra/Kconfig @@ -5,12 +5,14 @@ choice config PMC_MSP4200_EVAL bool "PMC-Sierra MSP4200 Eval Board" select CEVT_R4K + select CSRC_R4K select IRQ_MSP_SLP select HW_HAS_PCI config PMC_MSP4200_GW bool "PMC-Sierra MSP4200 VoIP Gateway" select CEVT_R4K + select CSRC_R4K select IRQ_MSP_SLP select HW_HAS_PCI |