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author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-11 17:08:33 (GMT) |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-11 17:08:33 (GMT) |
commit | d3d07d941fd80c173b6d690ded00ee5fb8302e06 (patch) | |
tree | f1a82c956e393df9933c8544bb564ef1735384ee /arch/sh/boards/mach-migor/setup.c | |
parent | 6cd8e300b49332eb9eeda45816c711c198d31505 (diff) | |
parent | 54ff328b46e58568c4b3350c2fa3223ef862e5a4 (diff) | |
download | linux-fsl-qoriq-d3d07d941fd80c173b6d690ded00ee5fb8302e06.tar.xz |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (266 commits)
sh: Tie sparseirq in to Kconfig.
sh: Wire up sys_rt_tgsigqueueinfo.
sh: Fix sys_pwritev() syscall table entry for sh32.
sh: Fix sh4a llsc-based cmpxchg()
sh: sh7724: Add JPU support
sh: sh7724: INTC setting update
sh: sh7722 clock framework rewrite
sh: sh7366 clock framework rewrite
sh: sh7343 clock framework rewrite
sh: sh7724 clock framework rewrite V3
sh: sh7723 clock framework rewrite V2
sh: add enable()/disable()/set_rate() to div6 code
sh: add AP325RXA mode pin configuration
sh: add Migo-R mode pin configuration
sh: sh7722 mode pin definitions
sh: sh7724 mode pin comments
sh: sh7723 mode pin V2
sh: rework mode pin code
sh: clock div6 helper code
sh: clock div4 frequency table offset fix
...
Diffstat (limited to 'arch/sh/boards/mach-migor/setup.c')
-rw-r--r-- | arch/sh/boards/mach-migor/setup.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c index 1ee1de0..6ed401c 100644 --- a/arch/sh/boards/mach-migor/setup.c +++ b/arch/sh/boards/mach-migor/setup.c @@ -584,3 +584,22 @@ static int __init migor_devices_setup(void) return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); } __initcall(migor_devices_setup); + +/* Return the board specific boot mode pin configuration */ +static int migor_mode_pins(void) +{ + /* MD0=1, MD1=1, MD2=0: Clock Mode 3 + * MD3=0: 16-bit Area0 Bus Width + * MD5=1: Little Endian + * TSTMD=1, MD8=0: Test Mode Disabled + */ + return MODE_PIN0 | MODE_PIN1 | MODE_PIN5; +} + +/* + * The Machine Vector + */ +static struct sh_machine_vector mv_migor __initmv = { + .mv_name = "Migo-R", + .mv_mode_pins = migor_mode_pins, +}; |