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authorJan Beulich <jbeulich@novell.com>2009-03-12 12:37:34 (GMT)
committerIngo Molnar <mingo@elte.hu>2009-03-13 01:37:17 (GMT)
commit13c6c53282d99c82e79b02477efd2c1e30a991ef (patch)
tree71c7b82f94e23ead15f49e4081937bd8d748cef5 /arch/x86/include/asm
parent46d50c98d90cd7feaa5977a09c574063e5c99b3d (diff)
downloadlinux-fsl-qoriq-13c6c53282d99c82e79b02477efd2c1e30a991ef.tar.xz
x86, 32-bit: also use cpuinfo_x86's x86_{phys,virt}_bits members
Impact: 32/64-bit consolidation In a first step, this allows fixing phys_addr_valid() for PAE (which until now reported all addresses to be valid). Subsequently, this will also allow simplifying some MTRR handling code. Signed-off-by: Jan Beulich <jbeulich@novell.com> LKML-Reference: <49B9101E.76E4.0078.0@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm')
-rw-r--r--arch/x86/include/asm/processor.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 7613950..bd3406d 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -75,9 +75,9 @@ struct cpuinfo_x86 {
#else
/* Number of 4K pages in DTLB/ITLB combined(in pages): */
int x86_tlbsize;
+#endif
__u8 x86_virt_bits;
__u8 x86_phys_bits;
-#endif
/* CPUID returned core id bits: */
__u8 x86_coreid_bits;
/* Max extended CPUID function supported: */